Ring-Oscillator Slew-Rate Calibration for Memory Link Drivers
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Solution Overview
Problem
Current memory systems face challenges in calibrating slew rates for high-frequency signaling due to inadequate methods and circuits, leading to signal distortions and errors caused by impedance discontinuities and signal reflections.
Innovation Solution
The implementation of a slew-rate calibration circuitry that includes a ring oscillator, SR computation circuitry, and driver-calibration circuitry to adjust the phase offsets and impedance of clock and command/address signals, enabling precise control of slew rates in multi-link drivers for improved signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If signal transmission is performed at very high frequencies, then signaling rate and storage capacity improve, but signal reflections and distortions increase due to impedance discontinuities
Solution Approach 1:
The patent adjusts the slew rate parameter of clock and command/address signals to optimize signal transmission. By dynamically changing the slew rate parameter, the system can reduce signal reflections and distortions while maintaining high signaling rates, thus resolving the contradiction between productivity and reliability
Solution Approach 2:
The patent implements dynamic slew rate calibration that adapts to different operating conditions. The system can adjust slew rate settings based on detected signal quality, enabling optimal performance across varying frequencies and load conditions, thereby maintaining both high signaling rates and signal integrity
2Reliability
If slew rate is adjusted to reduce signal reflections, then signal quality improves, but calibration methods and circuits become inadequate for very high frequencies
Solution Approach 1:
The patent replaces traditional mechanical or analog calibration methods with a digital calibration approach using a ring oscillator and digital computation circuitry. This substitution enables precise slew rate calibration at very high frequencies where traditional methods fail, improving both signal quality and calibration circuit adequacy
Solution Approach 2:
The patent introduces a ring oscillator as an intermediary device that generates reference clock signals for calibration. This intermediary enables the calibration circuit to accurately measure and adjust slew rates at high frequencies, bridging the gap between inadequate traditional calibration and the requirements of high-speed signaling
3Productivity
If buffer chips are used to optimize controller and memory interfaces, then interface performance improves, but impedance discontinuities and signal reflections are generated
Solution Approach 1:
The patent changes the slew rate parameter of signals passing through buffer chips to minimize reflections. By optimizing the slew rate at the buffer chip outputs, the system maintains improved interface performance while reducing the harmful signal reflections generated by impedance discontinuities
Data Source
AI summary
Described is an integrated circuit with a driving amplifier that transmits a signal over a link (e.g. a wire) by raising and lowering a voltage on the link. A reference oscillator provides an error measure for the rate at which the voltage transitions between voltages, the slew rate. Slew-rate calibration circuitry adjusts the driving amplifier responsive to the error measure.