Ring Oscillator Stack-Gate Noise Reduction
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Solution Overview
Problem
Existing clock source generators, such as ring-oscillators or phase-lock loop (PLL) circuits, suffer from device noise imperfections, particularly due to the use of LC-tanks which are area-consuming and sensitive to process variations, leading to on-die variations and complex design requirements.
Innovation Solution
The implementation of a stack-gate structure in delay units within ring oscillators, which reduces noise current and flicker noise by connecting multiple transistors in a specific configuration, thereby enhancing noise performance without increasing circuit complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LC-tanks are used in ring oscillators to reduce noise, then phase noise performance is improved, but area consumption increases and sensitivity to process variations worsens
Solution Approach 1:
The patent removes the LC-tank component from the ring oscillator design and replaces it with an alternative noise reduction mechanism using stacked transistors in the delay units. This extraction eliminates the area-consuming inductor while maintaining noise performance through a different architectural approach.
Solution Approach 2:
The patent combines multiple transistors into stacked configurations within the delay units of the ring oscillator. This merging of transistor elements creates a compact structure that reduces phase noise without requiring additional area, as the stacked transistors are integrated into the existing delay unit architecture.
2Reliability
If LC-tanks are used in ring oscillators to reduce noise, then phase noise performance is improved, but sensitivity to process variations increases
Solution Approach 1:
The patent extracts the LC-tank component that is inherently sensitive to process variations and replaces it with a transistor-based solution. The stacked transistor configuration is less susceptible to manufacturing variations, thereby improving robustness while maintaining noise performance.
Solution Approach 2:
The patent changes the operational parameters of the delay units by introducing stacked transistor configurations with specific gate voltage control. This parameter change allows for optimized noise performance that is less dependent on process variations, as the stacked structure provides better control over the oscillation characteristics.
3Reliability
If additional phase noise filter blocks are included in ring oscillators, then phase noise performance is improved, but device complexity increases
Solution Approach 1:
The patent merges the noise reduction function directly into the existing delay units of the ring oscillator by using stacked transistor configurations. This integration eliminates the need for separate phase noise filter blocks, thereby reducing device complexity while maintaining improved phase noise performance.
Solution Approach 2:
The stacked transistor structure in the delay units serves multiple functions: it provides the necessary delay for oscillation and simultaneously acts as a noise reduction mechanism. This multi-functionality eliminates the need for additional dedicated filter blocks, simplifying the overall device design.
Data Source
AI summary
An oscillation circuit is provided. The oscillation circuit includes a first inverting circuit. The first inverting circuit comprises a first transistor of a first type and a second transistor of the first type, wherein a gate terminal of the first transistor is connected to a gate terminal of the second transistor, and a source terminal of the first transistor is connected to a drain terminal of the second transistor.