Ring Oscillator VCO Biasing for Stable High-Frequency PLLs

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Solution Overview

Problem

Conventional voltage-controlled oscillators (VCOs) face instability when increasing current to achieve high-speed oscillation, as transistors operating as current sources exit their saturated region, leading to unstable operation.

Innovation Solution

A VCO configuration with a first transistor connected to an input voltage and a second transistor connected to a bias voltage, both connected to a ring oscillator, ensures stable operation by maintaining high current flow through the inverter ring and keeping transistors within the saturated region, thereby enabling stable high-speed oscillation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the current flowing to the ring oscillator is increased to achieve high-speed oscillation, then the oscillation speed is improved, but the transistor operates out of the saturated region causing instability

Engineering Contradiction:
Improveoscillation speedVSAvoidoperation stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The current source is divided into two separate transistors: a first transistor whose gate receives the input voltage (controlling voltage) and a second transistor whose gate receives a bias voltage (providing constant current). This segmentation allows the first transistor to control oscillation frequency while the second transistor maintains stable current flow, enabling high-speed oscillation without sacrificing stability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second transistor acts as an intermediary constant current source that mediates between the power supply and the ring oscillator. By providing a stable bias current independent of voltage fluctuations, it enables the ring oscillator to operate at high speeds while maintaining transistor saturation and operational stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If the current flowing to the inverter ring is increased for high-frequency oscillation, then the oscillation frequency is improved, but the voltage between the first node and the first power supply rises causing transistor instability

Engineering Contradiction:
Improveoscillation frequencyVSAvoidtransistor saturation stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The current source is divided into two separate transistors: a first transistor whose gate receives the input voltage (controlling voltage) and a second transistor whose gate receives a bias voltage (providing constant current). This segmentation allows the first transistor to control oscillation frequency while the second transistor maintains stable current flow, enabling high-speed oscillation without sacrificing stability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the control parameter of the current source by applying a fixed bias voltage to the second transistor's gate instead of varying voltage. This parameter change ensures the second transistor maintains constant current output even when the first transistor's control voltage changes, allowing frequency adjustment without compromising transistor saturation stability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11206028B2Voltage-controlled oscillator and PLL circuit in which same is used
Publication Date: 2021.12.21 SOCIONEXT INC
  • US11206028B2 patent drawing
  • US11206028B2 patent drawing
  • US11206028B2 patent drawing

AI summary

A voltage-controlled oscillator includes: a first transistor with its gate connected to an input terminal, its source connected to a first power supply, and its drain connected to a first node; a second transistor with its gate connected to a first bias voltage, its source connected to a second power supply, and its drain connected to the first node; and an inverter ring connected between the first node and the first power supply. The inverter ring is constituted by a plurality of stages of inverters connected in series, and an output of a final-stage inverter is connected to an output terminal and an input of an initial-stage inverter.