Ring VCO Feedforward Control for Wide-Range Low-Noise Clocks
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Solution Overview
Problem
In display driver integrated circuits, ring voltage-controlled oscillators face challenges in achieving a wider operating frequency range while reducing power supply voltage noise and ensuring excellent clock signal characteristics, due to susceptibility to power supply voltage noise and increased phase mismatch and jitter.
Innovation Solution
A voltage-controlled oscillator design with N stages of delay units, where the second and third inverters are connected to a frequency control terminal, allowing selective activation to control the feedforward path, expanding the frequency range and reducing noise, with a frequency comparison module to determine activation based on input data frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the power supply voltage of the ring oscillator is reduced to generate low-frequency clock signals, then the operating frequency range is expanded, but the VCO becomes more susceptible to power supply voltage noise such as ground bounce
Solution Approach 1:
The delay unit is divided into four separate inverters (first, second, third, and fourth inverters) instead of using a traditional ring oscillator structure. This segmentation allows independent control of each inverter's contribution to the delay, enabling precise frequency control without requiring extreme power supply voltage reduction, thereby reducing susceptibility to power supply noise while maintaining wide frequency range operation
Solution Approach 2:
The patent introduces dynamic control mechanisms including a frequency control terminal and control units that can selectively activate or deactivate specific inverters based on the desired output frequency. This dynamic reconfiguration allows the circuit to adapt its delay characteristics without changing power supply voltage extremes, thus expanding operating frequency range while avoiding ground bounce issues
2Adaptability or versatility
If the power supply voltage is reduced for low-frequency operation, then wider frequency range is achieved, but the clock signal swing level decreases and rising/falling time increases
Solution Approach 1:
Different inverters within the delay unit are configured with different characteristics and can be selectively activated based on the required frequency. The control units enable certain inverters to contribute more to the delay at lower frequencies while maintaining adequate swing levels, allowing the circuit to achieve wide frequency range operation without compromising signal quality and transition times
3Speed
If the clock signal rising/falling time increases, then low-frequency operation is achieved, but the phase mismatch of multi-phase clock increases and jitter becomes larger
Solution Approach 1:
The patent incorporates control units that monitor the output frequency and phase characteristics, and dynamically adjust which inverters are active in the delay path. This feedback mechanism ensures that even at low frequencies where longer delay times are required, the phase matching between multi-phase clocks is maintained by optimally selecting the combination of active inverters, thereby reducing jitter and phase mismatch
Solution Approach 2:
Instead of changing power supply voltage to adjust frequency, the patent changes the effective delay parameter by selectively enabling or disabling specific inverters in the delay chain. This parameter change approach allows precise control of delay time and phase relationships without the adverse effects of voltage scaling, maintaining low jitter and phase mismatch across the entire frequency range
Data Source
AI summary
This disclosure provides a voltage controlled oscillator and a control method thereof, a P2P interface circuit, an electronic device, and relates to the field of voltage controlled oscillation technology. The voltage controlled oscillator includes N stages of delay units, and the delay unit of each stage includes: a first inverter, a second inverter, a third inverter, and a fourth inverter; both the second inverter and the third inverter are electrically connected to a frequency control terminal, and whether to activate the second inverter and the third inverter is controlled by the frequency control terminal.