Ring VCO Delay Circuit for Transistor State Frequency Checking

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Solution Overview

Problem

Ring-based voltage-controlled oscillators (VCOs) face challenges in accurately determining the state of transistors, particularly N-type and P-type transistors, which affects the frequency of oscillation signals, and there is a need for improved methods to ensure the reliability and accuracy of these determinations.

Innovation Solution

The implementation of a ring-based VCO circuit with inverter circuits, delaying units, and complementary transistor pairs, where the number and type of transistors are configured to receive control voltages that determine the frequency of oscillation signals, and a method to check the state of transistors by measuring frequency within predetermined ranges, ensuring normal or failed transistor states are accurately determined.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If ring-based VCO is used for compact size and wider bandwidth, then device area and frequency range are improved, but transistor state determination accuracy deteriorates

Engineering Contradiction:
Improvedevice areaVSAvoidtransistor state determination accuracy
Core Design Contradiction:
Area of stationary objectVSMeasurement precision

Solution Approach 1:

The patent segments the VCO circuit into distinct functional blocks: multiple inverter circuits (first, second, third inverters), delaying units, and complementary transistor pairs. Each segment can be independently analyzed and tested, allowing for precise determination of transistor states within each segment through frequency measurement of its oscillation signal.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If ring-based VCO is used for wider bandwidth, then frequency range is improved, but frequency stability deteriorates

Engineering Contradiction:
Improvefrequency rangeVSAvoidfrequency stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent implements feedback mechanisms where the oscillation signal is fed back through the ring structure, and frequency measurement results are used to determine transistor states. This feedback allows the system to maintain frequency stability across a wide bandwidth by continuously monitoring and adjusting based on measured frequency values.

Inventive Principle:
Principle #23Feedback

3Reliability

If transistor state determination method is improved for reliability, then measurement accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvetransistor state determination reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The VCO circuit performs self-diagnosis by measuring its own oscillation frequency to determine the state of its transistors. The circuit uses its functional output (oscillation frequency) as the basis for detecting component states, eliminating the need for separate external testing equipment or complex diagnostic circuits.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8937512B1Voltage-controlled oscillator
Publication Date: 2015.01.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8937512B1 patent drawing
  • US8937512B1 patent drawing
  • US8937512B1 patent drawing

AI summary

A voltage-controlled oscillator is disclosed. The voltage-controlled oscillator includes an inverter circuit configured to output an oscillation signal. The first inverter circuit includes a complementary transistor pair and a transistor string. The complementary transistor pair includes a first switch transistor and a second switch transistor. The second switch transistor is connected to the first switch transistor, in which a first terminal of the second switch transistor is connected to a second terminal of the first switch transistor. The first delaying unit includes at least one delaying transistor. A first terminal of the at least one delaying transistor is connected to a control terminal of the second switch transistor. A second terminal of the at least one delaying transistor is connected to a control terminal of the first switch transistor. A control terminal of the at least one delaying transistor is configured to receive a voltage control signal.