Ring VCO Biasing Without LDOs for Supply Noise Rejection

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Solution Overview

Problem

Existing voltage-controlled oscillator (VCO) designs in phase-locked loops face challenges with high power consumption and increased area requirements due to the need for low drop out (LDO) regulators to manage power supply noise, especially with lower supply voltages and scaled-down technologies, which also result in increased cost and static power consumption even in power-down modes.

Innovation Solution

A low-power, reduced-area VCO design utilizing operational transconductance amplifier (OTA) feedback to provide good power supply noise rejection without an LDO regulator, eliminating static power consumption during power-down modes and reducing chip area and cost, while maintaining efficient power management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If an LDO regulator is used to reject power supply noise, then power supply noise rejection is improved, but chip area and cost increase

Engineering Contradiction:

Improvepower supply noise rejectionVSAvoidchip area

Core Design Contradiction:

Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent extracts and eliminates the LDO regulator from the VCO design, replacing it with a native supply noise rejection mechanism using supply-rejection biasing circuits that generate bias currents immune to supply voltage variations, thereby achieving noise rejection without the additional chip area overhead

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces supply-rejection biasing circuits as intermediary elements that mediate between the power supply and the VCO core, converting noisy supply voltage into stable bias currents through intermediate regulation stages that reject supply variations

Inventive Principle:

Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If an LDO regulator is used to reject power supply noise, then power supply noise rejection is improved, but cost increases

Engineering Contradiction:

Improvepower supply noise rejectionVSAvoidcost

Core Design Contradiction:

Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The patent removes the LDO regulator component entirely from the design, eliminating the associated manufacturing cost, extra power supply requirements, and additional chip area while maintaining noise rejection performance through integrated supply-rejection biasing circuits

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the expensive LDO regulator with simpler, lower-cost supply-rejection biasing circuits that achieve equivalent noise rejection functionality using standard CMOS devices and techniques, reducing overall manufacturing cost

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

3Object-affected harmful factors

If an LDO regulator is used to reject power supply noise, then power supply noise rejection is improved, but power consumption increases

Engineering Contradiction:

Improvepower supply noise rejectionVSAvoidpower consumption

Core Design Contradiction:

Object-affected harmful factorsVSUse of energy by moving object

Solution Approach 1:

The patent extracts and eliminates the power-consuming LDO regulator from the design, replacing it with supply-rejection biasing circuits that achieve noise rejection with minimal power consumption by using passive biasing techniques and avoiding continuous regulation overhead

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent employs periodic switching techniques in the supply-rejection biasing circuits, using pulsed or periodic regulation instead of continuous LDO operation, thereby reducing average power consumption while maintaining effective noise rejection during critical periods

Inventive Principle:

Principle #19Periodic action

4Use of energy by moving object

If supply voltage is scaled down to reduce power consumption, then power consumption is reduced, but power supply noise rejection becomes more difficult

Engineering Contradiction:

Improvepower consumptionVSAvoidpower supply noise rejection

Core Design Contradiction:

Use of energy by moving objectVSObject-affected harmful factors

Solution Approach 1:

The patent changes the operating parameters of the biasing circuits to maintain supply noise rejection effectiveness at lower supply voltages by adjusting bias current levels and transistor operating points to optimize rejection ratios in the low-voltage regime

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent implements dynamic supply-rejection biasing that adapts to varying supply voltage conditions, automatically adjusting bias parameters in real-time to maintain optimal noise rejection performance across different operating voltages and conditions

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS11843389B1Low-power, reduced-area VCO design with power supply noise rejection

Publication Date: 2023.12.12 AMBARELLA INT LP

AI summary

An apparatus comprises a first circuit and a second circuit The first circuit may be configured to generate a control current signal in response to a supply voltage and a first input signal. The first circuit generally provides supply noise rejection to variations in the supply voltage. The second circuit is generally connected to the first circuit and comprises a programmable ring oscillator configured to generate an output signal having a frequency based on the control current signal and a value of a second input signal.