Ring VCO Transistor Feedback for Low-Noise Wide Tuning
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Solution Overview
Problem
Conventional voltage-controlled oscillators (VCOs) in phase-locked loops (PLLs) face challenges with reduced power supply voltage and increased noise levels due to smaller silicon manufacturing nodes, while applications require broader operating ranges and higher signal-to-noise ratios.
Innovation Solution
The implementation of a VCO with ring-coupled delay elements, each including a feedback path with a gain-attenuating transistor coupled to the voltage tune line, which reduces noise and enhances the operating frequency range by attenuating gain and improving noise performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If conventional VCO designs are used in smaller silicon manufacturing nodes, then power supply voltage is reduced, but noise levels increase
Solution Approach 1:
The patent introduces a feedback path from the output of each delay element back to its input, creating a regenerative effect that amplifies the output signal. This feedback mechanism compensates for signal degradation and reduces noise without requiring higher power supply voltage, thus resolving the contradiction between reduced voltage and increased noise in scaled silicon nodes.
Solution Approach 2:
The patent changes the operational parameters of the delay elements by introducing configurable delay amounts that can be adjusted independently. By optimizing the delay parameters and using transistors with specific characteristics (e.g., triode region operation for gain attenuation), the system achieves low noise performance at reduced power supply voltages suitable for modern scaled silicon manufacturing.
2Ease of manufacture
If conventional VCO designs are used, then manufacturing is simpler, but operating frequency range is limited
Solution Approach 1:
The patent divides the VCO into multiple independent delay elements (first, second, third delay elements) with configurable delay amounts. Each delay element can be independently tuned, allowing the overall oscillation frequency to be adjusted across a broad range while maintaining a relatively simple ring oscillator structure that is easy to manufacture using standard CMOS processes.
Solution Approach 2:
The patent introduces dynamic controllability to the delay elements through configurable delay amounts that can be adjusted in real-time. This dynamic parameter adjustment enables the VCO to operate across a wide frequency range while maintaining the simplicity of the underlying ring oscillator architecture, thus achieving both ease of manufacture and broad adaptability.
3Measurement precision
If gain is increased to improve signal strength, then signal-to-noise ratio improves, but noise levels increase due to higher gain amplification
Solution Approach 1:
The feedback path creates a regenerative effect that builds up the output signal amplitude through constructive interference, rather than using high-gain amplification that would amplify noise. The feedback mechanism selectively amplifies the desired oscillation frequency while maintaining a favorable signal-to-noise ratio without introducing excessive noise.
Solution Approach 2:
The patent uses transistors operating in the triode region as gain-attenuating elements, which provide controlled gain attenuation rather than full amplification. This approach effectively manages the signal-to-noise ratio by preventing noise amplification while maintaining sufficient signal strength through the regenerative feedback mechanism.
Data Source
AI summary
An integrated circuit, a voltage controlled oscillator (VCO) and a phase-locked loop (PLL). In one embodiment, the VCO includes: (1) a voltage tune line configured to receive a tuning voltage for the VCO and (2) an odd number of ring-coupled delay elements. Each of the delay elements includes: (2A) an inverter having a power supply line being coupled to the voltage tune line and (2B) a feedback path having a gain-attenuating transistor with a gate thereof being coupled to the voltage tune line.


