3D Stacked IC with Riser Mounting for Thermal Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current integrated circuit systems face challenges in achieving smaller dimensions, lower costs, increased functionality, and improved reliability while maintaining competitive performance and thermal cooling, with existing solutions failing to provide a comprehensive solution for these needs.
Innovation Solution
The integrated circuit device system employs a carrier with a base device and elevated devices mounted on risers, allowing for a stacked configuration that increases device capacity, supports air cooling, and simplifies manufacturing through a mirrored chip assembly, enabling the use of standardized or customized devices with varying dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If devices are arranged in a planar configuration on the carrier, then manufacturing is simple, but device capacity and I/O connectivity are limited
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement to a three-dimensional stacked configuration by introducing vertical risers that elevate devices above the carrier plane. This dimensional change allows multiple devices to occupy the same footprint area at different heights, thereby increasing device capacity without expanding the carrier's planar dimensions.
Solution Approach 2:
The patent implements a nested structure where elevated devices are positioned above and partially overhang the base device, creating a hierarchical arrangement. The risers serve as supporting structures that nest within the vertical space, allowing compact stacking while maintaining accessibility to interconnects on multiple sides of each device.
2Quantity of substance
If devices are elevated on risers to increase capacity, then device capacity increases, but manufacturing complexity increases
Solution Approach 1:
The risers serve multiple functions simultaneously: they provide mechanical support for elevated devices, establish vertical spacing for thermal management, and facilitate interconnect routing between devices at different heights. This multi-functionality reduces the need for separate components, thereby simplifying the overall manufacturing process despite the three-dimensional configuration.
Solution Approach 2:
The patent employs asymmetric device placement where elevated devices are positioned at different locations and heights relative to the base device, with some devices overhanging others. This asymmetric arrangement optimizes I/O connectivity by exposing interconnects on multiple sides of each device, allowing flexible routing while maintaining manufacturing feasibility through standardized riser components.
3Volume of moving object
If devices are arranged in a compact stacked configuration, then device size is reduced, but thermal cooling becomes more difficult
Solution Approach 1:
The patent utilizes air flow (pneumatic principle) for thermal management by designing the stacked configuration to allow air to circulate through channels formed between the elevated devices and the carrier. The vertical spacing provided by the risers creates convection pathways that enable efficient heat dissipation from multiple devices simultaneously, addressing thermal management challenges in compact three-dimensional arrangements.
4Adaptability or versatility
If more I/O interconnects are provided on each device, then functionality increases, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent segments the interconnect routing into multiple independent pathways by utilizing the three-dimensional space. Each device's interconnects can be accessed from different sides and at different heights, allowing the I/O interface to be divided into multiple smaller connection groups. This segmentation reduces the complexity of any single interconnect route while maintaining high overall functionality through multiple access points.
Data Source
AI summary
A system and method of manufacture of an integrated circuit device system includes mounting a first elevated device on a first riser positioned adjacent to a base device. The first elevated device includes a first device overhang that extends over the base device. A second elevated device can be mounted on a second riser adjacent to the first riser to allow the attachment of a second elevated device mounted above the first elevated device to achieve higher component densities.


