Reinforcement Learning Circuit Verification Vector Generation
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Solution Overview
Problem
Current circuit design verification processes are complex and lack specific evaluation criteria, leading to inconsistent quality and performance, and machine learning-based approaches face limitations in processing large data sets and computational efficiency.
Innovation Solution
A device and method using reinforcement learning through neural network computation to generate verification vectors for circuit design verification, based on coverage metrics and adaptive data compression, allowing for efficient verification of circuit blocks with reduced computational load and simulation costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If machine learning algorithms are used for circuit design verification, then verification quality and performance can be improved, but the processing limit is exceeded due to large verification vector length, computation amount, and non-conformity
Solution Approach 1:
The patent divides the circuit design into multiple circuit blocks and generates verification vectors for each block separately. This segmentation reduces the overall complexity and processing requirements while maintaining verification quality, as each block can be verified independently with smaller-scale machine learning computations.
Solution Approach 2:
The patent performs preliminary determination of verification vectors using machine learning algorithms before actual circuit verification. By pre-generating verification vectors that are optimized for specific circuit blocks, the system reduces the computational burden during the actual verification process while ensuring high verification quality.
2Reliability
If comprehensive verification is performed to ensure quality and performance, then verification coverage is improved, but simulation cost increases significantly
Solution Approach 1:
The patent applies different verification strategies and parameters for different circuit blocks based on their specific characteristics. By tailoring the verification approach to each local circuit block's requirements, the system achieves comprehensive verification coverage while avoiding unnecessary simulation costs for blocks that require less rigorous testing.
Solution Approach 2:
The patent dynamically adjusts verification parameters such as vector length, computation depth, and simulation intensity based on the specific circuit block being verified. This parameter optimization ensures adequate verification coverage for critical blocks while reducing simulation costs for less critical blocks, resolving the contradiction between comprehensive verification and simulation cost.
Data Source
AI summary
A method of reinforcement learning of a neural network device for generating a verification vector for verifying a circuit design comprising a circuit block includes inputting a test vector to the circuit block, generating one or more rewards based on a coverage corresponding to the test vector, the coverage being determined based on a state transition of the circuit block based on the test vector, and applying the one or more rewards to a reinforcement learning.