Controlling RMG Critical Dimension via Dummy Gate Replacement

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Solution Overview

Problem

The integration of replacement metal gates (RMGs) in semiconductor devices often results in dimensional inconsistencies with dummy gates, leading to poor performance and reduced AC performance due to changes introduced by spacers and other integration specifics.

Innovation Solution

A method is implemented to control the critical dimension (CD) of RMGs by forming a dummy gate with a cap layer over a substrate, followed by a re-oxide layer, doping implants, removal of the re-oxide layer, formation of spacers and an epitaxial layer, and eventual replacement with a metal gate, ensuring dimensional consistency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If spacers are introduced when forming a replacement metal gate (RMG), then the RMG width increases significantly compared to the dummy gate, but this results in dimensional inconsistency and poor device performance

Engineering Contradiction:
ImproveRMG formation processVSAvoidcritical dimension consistency
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The method performs preliminary actions by forming the re-oxide layer and performing doping implants before removing the dummy gate. This sequence ensures that the substrate is properly prepared and doped before the metal gate is formed, preventing dimensional inconsistencies while maintaining ease of manufacture

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The process segments the gate formation into distinct stages: dummy gate formation with cap layer, re-oxide layer formation, doping implants, re-oxide removal, and final metal gate formation. This segmentation allows each step to be optimized independently, achieving both manufacturing ease and dimensional precision

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the dummy gate dimensions are greatly different from the final RMG dimensions, then integration specifics such as spacer introduction are required, but this leads to diminished AC performance

Engineering Contradiction:
Improveintegration flexibilityVSAvoiddevice performance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The method changes the critical dimension parameter by forming the re-oxide layer that extends beyond the dummy gate edges, then performing doping implants that define the final gate dimensions. This parameter change ensures dimensional consistency between dummy and metal gates while maintaining integration flexibility

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The re-oxide layer serves as an intermediary structure that mediates between the dummy gate and the final metal gate. It provides a template for doping and ensures dimensional consistency, acting as a bridge that maintains reliability during the transition from dummy to metal gate

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach maintains dimensional consistency between dummy gates and RMGs, improving device performance by reducing Cov and enhancing Leff, Loff, and Cov metrics, as shown in simulation results.

Implementation Method 1

forming a re-oxide layer over the substrate and around the dummy gate

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

implanting a set of doping implants in the substrate

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

forming an epitaxial layer around the dummy gate

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS8846464B1Semiconductor device having controlled final metal critical dimension
Publication Date: 2014.09.30 GLOBALFOUNDRIES US INC
  • US8846464B1 patent drawing
  • US8846464B1 patent drawing
  • US8846464B1 patent drawing

AI summary

An approach for controlling a critical dimension (CD) of a RMG of a semiconductor device is provided. Specifically, embodiments of the present invention allow for CD consistency between a dummy gate and a subsequent RMG. In a typical embodiment, a dummy gate having a cap layer is formed over a substrate. A re-oxide layer is then formed over the substrate and around the dummy gate. A set of doping implants will then be implanted in the substrate, and the re-oxide layer will subsequently be removed (after the set of doping implants have been implanted). A set of spacers will then be formed along a set of side walls of the dummy gate and an epitaxial layer will be formed around the set of side walls. Thereafter, the dummy gate will be replaced with a metal gate (e.g., an aluminum or tungsten body having a high-k metal liner there-around).