True Random Number Generator Ring Oscillator Sampling
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Solution Overview
Problem
Existing true random number generators using ring oscillators face challenges in achieving high entropy bit rates while maintaining low power consumption and circuit size, with sampling periods often being too long due to jitter accumulation, leading to inefficient entropy generation.
Innovation Solution
The proposed method involves a free-running oscillator with an odd number of inverters, where signal samples are taken simultaneously between each pair of adjacent cells in the ring, with a sampling period set within a specific interval relative to the jitter standard deviation and propagation time, allowing for the combination of these samples to generate random bits efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a low-frequency clocked circuit samples the output of a high-frequency Free-Running ring Oscillator to generate random numbers, then random number generation is achieved, but a predictable pattern may induce oscillator failure which is difficult to detect and prevent
Solution Approach 1:
The patent implements a feedback mechanism where the sampling circuit monitors the oscillator output and detects predictable patterns that indicate oscillator failure. When such patterns are detected, the system can trigger alerts or corrective actions, transforming the undetectable failure mode into a manageable condition through continuous monitoring and feedback control.
2Reliability
If the sampling period is extended to allow sufficient jitter accumulation for entropy generation, then entropy is improved, but the entropy bit rate decreases due to longer sampling intervals
Solution Approach 1:
The patent applies preliminary action by pre-characterizing the jitter accumulation behavior of the oscillator through modeling and analysis. By understanding the jitter growth pattern in advance, the system can determine optimal sampling periods that achieve sufficient entropy while maximizing the bit rate, avoiding the need for excessively long sampling periods.
Solution Approach 2:
The patent employs parameter changes by adjusting the sampling period to an optimized value that balances jitter accumulation with bit rate requirements. Rather than using conservative long sampling periods, the system dynamically selects sampling intervals based on the oscillator's specific jitter characteristics, thereby improving entropy bit rate while maintaining adequate entropy quality.
3Productivity
If multiple ring oscillators are used in parallel to increase entropy bit rate, then productivity is improved, but power consumption and circuit size increase
Solution Approach 1:
The patent applies dynamics by implementing a system that can dynamically adjust its operation based on entropy requirements. Rather than continuously running multiple oscillators at full capacity, the system can activate or deactivate oscillators based on demand, or adjust sampling rates dynamically, thereby achieving high entropy bit rates when needed while reducing power consumption during normal operation.
4Measurement precision
If the sampling period is extended to ensure sufficient jitter accumulation, then entropy quality is improved, but time loss increases due to longer sampling intervals
Solution Approach 1:
The patent uses parameter changes by optimizing the sampling period based on the oscillator's jitter characteristics. By modeling the jitter accumulation process, the system determines the minimum sampling period required to achieve sufficient entropy quality, thereby minimizing time loss while maintaining high entropy standards. This replaces conservative long sampling periods with optimized shorter intervals.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the entropy bit rate by reducing the sampling period, maintaining or improving entropy, and reducing power consumption and circuit size, while ensuring oscillation stability and robustness against noise sources.
Implementation Method 1
Internal noise sources in the elements forming the oscillator OSC1 influence switching times of the inverters I1-Im, and thus the output frequency of the oscillator OSC1 builds up a certain amount of jitter or phase noise over time
Implementation Method 2
the output frequency of the oscillator OSC1 builds up a certain amount of jitter or phase noise over time
Data Source
Figure 1~2C
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Figure 5~8
AI summary
The invention relates to a method for generating a random number, comprising steps of: connecting signal transmitting cells (CL1-CLm, I1) to form a ring of cells connected in series, the cells comprising an odd number of inverters (I1); simultaneously taking signal samples (S0-Sm) of signals transiting respectively between pairs of adjacent cells in the ring; and combining the signal samples to provide a random number (Out).