RNN Bit-Split Output Generation for Real-Time Mobile Inference

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Solution Overview

Problem

Existing neural network systems face challenges in efficiently generating output examples, particularly in environments with limited computational resources, such as mobile devices, where real-time output generation is required.

Innovation Solution

The system employs a recurrent neural network that splits the generation of N-bit output values into two halves, generating the first half and then the second half conditioned on the first half, reducing the number of sequential matrix-vector product computations and facilitating real-time implementation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the system generates N-bit output values using traditional sequential matrix-vector product computations, then the computational accuracy is maintained, but the computational time and resource consumption increase significantly

Engineering Contradiction:
Improveoutput generation speedVSAvoidcomputation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the generation of N-bit output values into two separate stages: first generating the most significant bits (MSBs) and then generating the least significant bits (LSBs). This segmentation allows the system to process smaller bit portions sequentially, reducing the computational burden at each step while maintaining overall output quality. The MSBs are generated first with coarser precision, then the LSBs are generated conditioned on the MSBs, achieving a balance between speed and accuracy.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If the system uses a recurrent neural network with full N-bit processing, then the output quality is maintained, but the device complexity and computational resource requirements increase

Engineering Contradiction:
Improveoutput generation accuracyVSAvoidcomputational resource requirements
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the output generation into two separate neural network processing stages: one for MSBs and one for LSBs. Each stage processes a smaller portion of the bit sequence, reducing the complexity of individual computation steps. The first network generates MSBs with reduced computational requirements, and the second network generates LSBs conditioned on the MSBs, thereby maintaining overall accuracy while reducing per-step device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary generation of the most significant bits before generating the least significant bits. This preliminary action allows the system to establish a coarse output framework first, then refine it with additional detail. The MSBs are generated using simplified computations, and then the LSBs are generated conditioned on these preliminary MSB values, reducing the overall computational complexity while maintaining output quality.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If the system processes complete N-bit values in each time step, then the computational precision is maintained, but the number of sequential operations increases

Engineering Contradiction:
Improvebit value precisionVSAvoidoperations per time step
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent divides the N-bit output generation into two separate processing operations: one for MSBs and one for LSBs. Instead of performing a single large-scale matrix-vector product for all N bits, the system performs two smaller operations. The first operation generates MSBs with fewer computational steps, and the second operation generates LSBs conditioned on the MSBs, thereby increasing operations per time step while maintaining precision through the conditional generation process.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250117652A1Generating output examples using recurrent neural networks conditioned on bit values
Publication Date: 2025.04.10 GDM HOLDING LLC
  • US20250117652A1 patent drawing
  • US20250117652A1 patent drawing
  • US20250117652A1 patent drawing

AI summary

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating output examples using neural networks. Each output example includes multiple N-bit output values. To generate a given N-bit output value, a first recurrent input comprising the preceding N-bit output value is processed using a recurrent neural network and in accordance with a hidden state to generate a first score distribution. Then, values for the first half of the N bits are selected. A second recurrent input comprising (i) the preceding N-bit output value and (ii) the values for the first half of the N bits are processed using the recurrent neural network and in accordance with the same hidden state to generate a second score distribution. The values for the second half of the N bits of the output value are then selected using the second score distribution.