Resistive Non-Volatile Memory Read Circuit with Calibration
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Solution Overview
Problem
Resistive non-volatile memories, such as MRAM, face challenges in reliably sensing stored states due to small resistance differences between low and high states of magnetic tunnel junctions (MTJs), which can be masked by significant resistance variations across the array caused by layout, process, and temperature changes.
Innovation Solution
The implementation of a resistive non-volatile memory (RNVM) with three access transistors and two MTJ elements, where a read operation is performed in two phases: a calibration phase and a sense phase, using capacitors to null amplifier offset voltages and selectively apply voltage offsets to source lines, allowing for reliable read operations without drawing current on entire word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional sensing methods are used with small resistance differences in MTJ, then the sensing operation is simple, but the reliability of state detection deteriorates due to overlap with reference voltage
Solution Approach 1:
The patent applies preliminary action by performing a calibration phase before the actual sense operation. During calibration, the amplifier is offset-nulled by connecting its output to its non-inverting input through a switch, establishing a zero-reference point. This preliminary calibration eliminates amplifier offsets that would otherwise cause unreliable sensing, allowing accurate detection of small resistance differences in the subsequent sense phase without requiring complex real-time compensation circuits.
2Productivity
If high voltage is applied for programming operations, then the programming speed is improved, but power consumption increases
Solution Approach 1:
The patent employs periodic action by using pulsed voltage sequences for programming operations. Instead of continuous high voltage, the system applies programmed voltage pulses to the bit lines and word lines only during the required programming intervals. The sense amplifier and calibration circuitry operate in periodic phases (calibration phase followed by sense phase), enabling fast programming when needed while consuming minimal power during idle or read-only periods, thus resolving the contradiction between programming speed and power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of read operations by accurately sensing programmed resistance values, reducing power consumption, and minimizing read disturb, thereby improving the overall performance of resistive non-volatile memory systems.
Implementation Method 1
MRAM stores a memory state by changing a resistance of a resistive element called a magnetic tunnel junction (MTJ)
Implementation Method 2
A capacitor may be coupled to each bit line of a column, or may be shared by multiple columns
Data Source
AI summary
A resistive non-volatile memory (NVMN) cell has three select transistors connected together in series. A first resistive element has a first terminal connected between first and second select transistors and a second terminal. A second resistive element has a first terminal connected between second and third transistors. In a first embodiment, the second terminals of the first and second resistive elements are connected to bit lines. In a second embodiment, the second terminals of the first and second resistive elements are connected to source lines. In the first embodiment, when the center select transistor is conductive, the first and second resistive elements become a resistor-divider. Each of the first and second resistive elements include a magnetic tunnel junction (MTJ).