Roller Chip Transport for Multi-Wafer UHD Display Assembly

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Solution Overview

Problem

Conventional carriers are limited to picking up chips from one wafer at a time, which hinders the efficient transportation of a large quantity of chips needed for high-resolution displays, such as UHD displays, leading to increased manufacturing time.

Innovation Solution

A process system and method utilizing a roller that picks up chips from multiple wafers arranged in columns and transports them to a substrate, allowing for simultaneous collection and transfer of chips from multiple wafers, including red, green, and blue chips, by rolling in specific directions and adhering chips to its surface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a conventional carrier is used to pick up chips, then the carrier can transport chips from one wafer, but it can only handle one wafer at a time which increases manufacturing time

Engineering Contradiction:
Improvechip transportation efficiencyVSAvoidmanufacturing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent combines multiple wafer handling operations into a single carrier. The carrier is designed with multiple pickup regions that can simultaneously pick up chips from multiple different wafers arranged in a stack, and transfer them to corresponding locations on the substrate in one transportation cycle, thereby increasing productivity and reducing manufacturing time

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a vertical stacking dimension by arranging multiple wafers in a stack configuration. The carrier operates in three-dimensional space, picking up chips from vertically stacked wafers at different heights and transferring them to the substrate, thus adding a vertical dimension to the traditionally planar chip transfer process

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple wafers are arranged in a stack, then multiple chips can be picked up simultaneously, but the wafer arrangement complexity increases

Engineering Contradiction:
Improvechip pickup efficiencyVSAvoidwafer arrangement complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the wafer stack into multiple discrete pickup regions, each corresponding to a specific wafer position in the stack. The carrier is divided into multiple pickup regions that can independently engage with chips from different wafers, allowing for organized and systematic handling of the vertically arranged wafers

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The carrier acts as an intermediary between the vertically stacked wafers and the substrate. It provides a mediating structure with multiple pickup regions that can simultaneously interact with chips from different wafer levels and transfer them to the substrate, simplifying the overall coordination of the multi-wafer process

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces manufacturing time by enabling the efficient pickup and transport of multiple chips from multiple wafers, addressing the limitations of existing technologies and facilitating the production of high-resolution displays.

Implementation Method 1

picking up a plurality of first chips from a first wafer, located at the first position on the rolling surface, by adhering the plurality of first chips to a curved surface of the roller

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS11121011B2Process system and operation method thereof
Publication Date: 2021.09.14 SAMSUNG ELECTRONICS CO LTD
  • US11121011B2 patent drawing
  • US11121011B2 patent drawing
  • US11121011B2 patent drawing

AI summary

A process system includes a substrate, first wafers, second wafers, and a roller. The first wafers are arranged at predetermined intervals along a first column which is parallel to an edge of the substrate, wherein each of the first wafers includes first chips. The second wafers are arranged at the predetermined intervals and at an offset from the first wafers, along a second column which is parallel to the first column, wherein each of the second wafers includes second chips. The roller is configured to roll in a first direction to pick up the plurality of first chips, roll in a second direction opposite to the first direction while suspended from the first wafers, pick up the second chips included in the wafers by rolling in the first direction, and transport the first chips and the second chips to the substrate.