Mask ROM Bitcell Programming via Segmented Via Connections

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Solution Overview

Problem

Mask programmed ROM arrays face challenges such as long turnaround times, impracticality for research and development due to fixed data content, and high costs for rectifying faulty arrays, as they cannot be modified post-fabrication, and they are not scalable without area penalties.

Innovation Solution

A method for programming bitcells in a mask programmed ROM array using a bitline and referential track to supply reference voltage, with conductive vias connecting these tracks to conductive areas of the bitcells, allowing for programming of data states and enabling scalability across different technologies without area penalties by using multiple programming cells and varying via connections based on the array's orientation and previous programming states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If mask programming is used to program ROM arrays, then manufacturing cost per chip is reduced, but turnaround time for design changes increases and adaptability decreases

Engineering Contradiction:
Improvemanufacturing cost per chipVSAvoidadaptability to design changes
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent segments the programming process into two distinct layers: a first programming layer performed during fabrication using mask programming for high-density data storage, and a second programming layer performed after fabrication using programmable cells for customer-specific data entry. This segmentation allows each layer to optimize for its specific function, resolving the contradiction between manufacturing efficiency and adaptability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary programming of the high-density data portion during fabrication using mask programming, establishing the base data structure in advance. This preliminary action enables subsequent flexible programming of the remaining data portions without requiring complete re-fabrication, thus maintaining low manufacturing costs while enabling adaptability.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If mask programming is used to program ROM arrays, then data density can be maximized, but the ability to modify content after fabrication is lost

Engineering Contradiction:
Improvedata densityVSAvoidability to modify content
Core Design Contradiction:
Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The patent divides the data storage capacity into two segments: a first data portion stored in high-density format during fabrication, and a second data portion that remains programmable after fabrication. This segmentation allows the system to achieve high overall data density while preserving modifyability for the second portion.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic programmability to an otherwise static mask-programmed ROM structure by incorporating programmable cells that can be configured after fabrication. This dynamic element allows content modification while the majority of the array maintains its high-density static structure.

Inventive Principle:
Principle #15Dynamics

3Loss of time

If via layers are changed for different customers to reduce turnaround time, then manufacturing cost increases due to multiple mask changes

Engineering Contradiction:
Improveturnaround timeVSAvoidmanufacturing cost
Core Design Contradiction:
Loss of timeVSEase of manufacture

Solution Approach 1:

The patent segments the programming tasks by data portion: the first data portion is programmed once during fabrication for all customers, while the second data portion is programmed individually for each customer after fabrication. This segmentation eliminates the need for multiple expensive mask changes while still enabling customer-specific customization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses a standardized array structure that can be copied and reused across different customer orders. The programmable cells act as flexible copies that can be configured differently for each customer without requiring changes to the underlying array structure or additional mask fabrication.

Inventive Principle:
Principle #26Copying

4Area of stationary object

If ROM arrays are designed for high density using FEOL and BEOL layers, then area efficiency improves, but scalability to smaller technology nodes becomes challenging

Engineering Contradiction:
Improvearea efficiencyVSAvoidscalability to smaller technology nodes
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent segments the bitcell structure into a first portion implemented in FEOL/BEOL layers for high-density storage and a second portion implemented in programmable cells for flexibility. This segmentation allows the high-density portion to be optimized for current technology nodes while the programmable portion can be independently scaled to smaller nodes as technology evolves.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal array structure that combines high-density storage functionality with programmable functionality. This multi-functional design allows the same physical structure to serve both high-density data storage and flexible configuration needs, facilitating scalability across different technology nodes and application requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3121818B1Method to program bitcells of a ROM array
Publication Date: 2018.08.22 SYNOPSYS INC
  • EP3121818B1 patent drawingFigure 1A~1B
  • EP3121818B1 patent drawingFigure 2
  • EP3121818B1 patent drawingFigure 3

AI summary

A method to program bitcells (11, ..., mn) of a ROM array (10) uses different programming cells (0a, ..., 0h, 1a, ..., 1d) for programming the bitcells (11, ..., mn) with a first or second data item. A first bitcell (11) is programmed by means of a selected programming cell, wherein the programming cell is selected in dependence on operating the memory array (10) as a flipped or a non-flipped memory in multi-bank instance. All other bitcells (12, 13) located in the same column (C1) as the first bitcell (11) and subsequent rows (R2, R3) are programmed by selected programming cells, wherein the selection of the programming cells is dependent on operating the memory array (10) as a flipped or a non-flipped memory in multi-bank instance and the programming state of the programming cells used for the previously programmed bitcells in the same column (C1).