ROM Data Controller for Multi-Plane Error Correction
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Solution Overview
Problem
Storage devices face challenges in detecting and correcting errors in Read Only Memory (ROM) data, which can lead to erroneous operations and data integrity issues across multiple planes and memory devices.
Innovation Solution
A storage device with a memory controller that includes an operation state determiner and a ROM data controller, capable of comparing ROM data across multiple planes and memory devices, identifying errors, and correcting or replacing non-majority ROM data with majority data to ensure consistent operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If ROM data is stored in multiple planes without verification, then storage capacity is increased, but data integrity deteriorates due to potential errors in ROM data
Solution Approach 1:
The system reads ROM data from multiple planes and uses majority voting feedback to verify data consistency. When errors are detected in some planes, the system compares them with data from other planes and corrects the erroneous data based on the majority result, ensuring data integrity while maintaining multi-plane storage capacity
Solution Approach 2:
The system performs preliminary verification of ROM data by reading and comparing data from multiple planes before executing operations. This preliminary check identifies and corrects potential errors in advance, preventing erroneous operations while maintaining the benefits of multi-plane storage
2Reliability
If ROM data from all planes is verified for consistency, then data reliability is improved, but operation time increases due to additional verification steps
Solution Approach 1:
The system performs verification on a selective basis rather than always verifying all ROM data. When the memory device is in a ready state, full verification is performed; otherwise, verification is skipped or reduced. This partial verification approach maintains data reliability while minimizing the time penalty
Solution Approach 2:
The verification process is performed preliminarily when the memory device is in a ready state, before actual operations are executed. This allows the system to prepare verification results in advance, so that when operations are needed, the verification is already complete or can be quickly determined to be unnecessary
3Reliability
If error detection and correction mechanisms are implemented, then data integrity is improved, but device complexity increases due to additional controllers and verification logic
Solution Approach 1:
The memory device performs self-verification of its own ROM data using built-in controllers that read and compare data from multiple planes. The device autonomously detects and corrects errors without requiring external verification systems, maintaining data integrity while avoiding the need for additional complex external control mechanisms
Solution Approach 2:
The verification and error correction functions are merged into the existing memory controller structure. The controller that manages normal memory operations also handles ROM data verification by reading from multiple planes and performing majority voting, eliminating the need for separate dedicated verification hardware and reducing overall device complexity
Data Source
AI summary
A storage device detects an error of ROM data and corrects the error. The storage device includes a memory device and a memory controller for controlling the memory device. The memory device includes a plurality of planes each storing Read Only Memory (ROM) data, and a ROM data controller configured to control the plurality of planes based on whether the ROM data from all of the planes are the same. The memory controller includes an operation state determiner configured to output to the ROM data controller a ROM data output command for reading the ROM data respectively stored in the plurality of planes, according to an operation state of the memory device.