ROM Circuit Debugging via Compare-Load Unit

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Solution Overview

Problem

Existing ROM circuits are non-versatile and cannot be modified, debugged, or updated, limiting their application in microprocessor systems and digital signal processors, as they require specific equipment or geometrical disposition for data modification.

Innovation Solution

A ROM circuit with a Debug Program Memory (DPM) and a Program Counter (PC) that allows for debugging and updating by replacing main program addresses with debug/update addresses, using a compare-load unit with a comparator and multiplexer to manage the address changes, enabling the execution of debug/update programs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If ROM is used to store main program, then data persistence is improved, but flexibility for debugging and updating deteriorates

Engineering Contradiction:
Improvedata persistenceVSAvoidflexibility for debugging and updating
Core Design Contradiction:
Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The memory system is segmented into two distinct parts: ROM for storing the main program (providing persistence) and DPM for storing debug/update programs (providing flexibility). This segmentation allows each part to fulfill its specific function without compromising the other, resolving the contradiction between data persistence and debugging flexibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The DPM acts as an intermediary between the external debugging equipment and the ROM. It provides a bridge that allows debug and update operations to be performed on ROM content indirectly, maintaining ROM's persistence while enabling flexible debugging through the DPM mediator.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If traditional ROM structure is used, then manufacturing simplicity is improved, but ease of repair and updating deteriorates

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidease of updating
Core Design Contradiction:
Ease of manufactureVSEase of repair

Solution Approach 1:

By segmenting the memory into ROM and DPM, the system maintains the simple manufacturing process of traditional ROM while adding a separate DPM component that enables easy updating and repair operations without complicating the core ROM manufacturing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The DPM serves multiple functions: it stores debug programs, facilitates ROM updating, and enables repair operations. This multi-functionality allows a single additional component to address various maintenance and repair needs, improving ease of repair without significantly increasing manufacturing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If ROM is made non-versatile for data storage, then reliability is improved, but adaptability for different applications deteriorates

Engineering Contradiction:
Improvedata stabilityVSAvoidapplication scope
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system segments memory functionality into ROM for reliable main program storage and DPM for versatile debug and update operations. This segmentation preserves ROM's reliability while the DPM provides the necessary adaptability for different debugging and updating applications.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The DPM serves as an intermediary that extends the application scope of the ROM system. It enables various debugging and updating applications to be performed on ROM content without compromising ROM's inherent reliability, as all modifications go through the controlled DPM interface.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7454663B2Method and circuitry for debugging/updating ROM
Publication Date: 2008.11.18 TIAN HOLDINGS LLC
  • US7454663B2 patent drawing
  • US7454663B2 patent drawing
  • US7454663B2 patent drawing

AI summary

A read only memory circuit for debugging and updating, the circuit includes read only memory, debug program memory, program counter, and compare and load unit. In the circuit, the compare and load unit detects instruction-read-memory-address from the program counter. If the instruction-read-memory-address is a predetermined main program address, the compare and load unit serves to transmit a debug address in the debug program memory to the program counter to update the original instruction-read-memory-address for debugging.