Rotated Stack Modules in Semiconductor Packages
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Solution Overview
Problem
Current semiconductor package technologies face challenges in maximizing integration density and efficient interconnection of multiple semiconductor dies, particularly in vertically stacked modules, where existing designs often result in complex and inefficient interposing bridge configurations.
Innovation Solution
The semiconductor package employs a configuration where stack modules are rotated by different angles corresponding to multiples of a reference angle, with interposing bridges and through vias arranged in divided regions, allowing for independent electrical connections to each semiconductor die through redistribution lines, enabling efficient vertical interconnection and independent operation of dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor dies are vertically stacked in one package, then integration density is improved, but interconnection complexity increases
Solution Approach 1:
The interposing bridge is divided into multiple divided regions, with each region containing through vias that connect to specific semiconductor dies. This segmentation allows independent electrical connections to each die, simplifying the overall interconnection architecture by organizing complex connections into modular, manageable segments rather than requiring a monolithic interconnection structure.
Solution Approach 2:
The patent introduces a vertical stacking dimension with rotation angles, arranging semiconductor dies and interposing bridges in three-dimensional space. By rotating stack modules by different rotation angles (multiples of a reference angle) and vertically stacking them, the design transforms two-dimensional planar interconnections into three-dimensional spatial arrangements, increasing integration density while managing interconnection complexity through spatial separation.
2Productivity
If through vias are arrayed in multiple columns in divided regions, then interconnection efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
Each divided region of the interposing bridge is configured with through vias arrayed in specific column patterns that are optimized for local connection requirements. The columns in which through vias are arrayed differ according to the divided regions, allowing each region to have tailored via arrangements that optimize interconnection efficiency for its specific semiconductor die connections, rather than using a uniform pattern across the entire bridge.
Solution Approach 2:
The through vias are arranged in asymmetric column patterns across different divided regions, with each region having distinct column configurations. This asymmetric arrangement optimizes connection paths for each specific die-bridge interface, improving interconnection efficiency by minimizing via counts and connection lengths for each local connection scenario.
3Area of stationary object
If stack modules are rotated by different angles, then spatial utilization is improved, but assembly complexity increases
Solution Approach 1:
Stack modules are rotated by periodic angles that are multiples of a reference angle (e.g., 90-degree increments for four dies). This periodic rotation pattern creates a regular, repeating structural motif that maximizes spatial utilization of the package area while maintaining assembly simplicity through standardized, repeatable rotation steps rather than arbitrary angles.
Solution Approach 2:
The interposing bridge design with divided regions and column-arrayed through vias serves multiple functions simultaneously: it provides electrical connections to multiple semiconductor dies, enables independent die operation, facilitates vertical stacking with rotation, and optimizes spatial utilization. This multi-functional design reduces overall assembly complexity by consolidating multiple requirements into a single unified structure.
Data Source
AI summary
A semiconductor package includes a plurality of stack modules which are vertically stacked. Each of the stack modules includes an interposing bridge, a semiconductor dies, and redistribution lines. The stack modules are provided by rotating each of the stack modules by different rotation angles corresponding to multiples of a reference angle and by vertically stacking the rotated stack modules. The interposing bridge includes a plurality of sets of through vias, and each set of through vias includes through vias arrayed in a plurality of columns. The plurality of sets of through vias are disposed in respective ones of divided regions of the interposing bridge. If the plurality of sets of through vias are rotated by the reference angle, then the rotated through vias overlap with the plurality of sets of through vias which are originally located. The redistribution lines connect the semiconductor dies to the plurality of sets of through vias.