Stacked Semiconductor Device Serial Path via Rotated TSV Chips
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Solution Overview
Problem
Conventional stacked semiconductor devices face performance deterioration and increased size due to wire bonding, and the complexity of signal transfer paths limits design flexibility and efficiency.
Innovation Solution
A stacked semiconductor device design where chips with the same via hole pattern are alternately rotated to form both serial and parallel paths, using symmetrical through-silicon vias and bumps to enable efficient signal transfer without the need for discrete wire bonding, allowing for reduced thickness and mounting area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If wire bonding is used to connect input/output terminals on stacked chips, then the device can be assembled with conventional techniques, but the performance deteriorates due to increased inductance and the device size increases
Solution Approach 1:
The patent extracts and eliminates the wire bonding element from the stacked chip interconnection system. By removing the external wire bonds and replacing them with direct through-silicon via connections between stacked chips, the source of inductance and size increase is eliminated, thereby improving signal performance while maintaining assembly capability through the TSV-bump interconnection method
Solution Approach 2:
The patent introduces through-silicon vias (TSVs) filled with conductive material as an intermediary connection structure between stacked chips. These TSVs serve as the mediator that enables direct electrical connection between chips without requiring external wire bonds, thus resolving the contradiction by providing both connection functionality and improved electrical performance
2Ease of manufacture
If wire bonding is used to connect chips, then the device can be assembled, but the device size increases
Solution Approach 1:
The patent removes the wire bonding structure from the system, eliminating the need for additional space required for wire routing and bonding pads on the chip surfaces. This extraction of the wire bonding element directly reduces the overall device footprint while maintaining assembly capability through the compact TSV-based interconnection
Solution Approach 2:
The patent transitions from a planar wire bonding approach to a three-dimensional vertical interconnection approach using through-silicon vias. By moving the connection path from the horizontal plane to the vertical dimension through the chip thickness, the mounting area is significantly reduced while assembly remains feasible through bump bonding to the TSV structures
3Adaptability or versatility
If multiple chip patterns and processes are used to form serial and parallel paths, then signal transfer paths can be formed, but design flexibility is limited and complexity increases
Solution Approach 1:
The patent implements a universal chip pattern where identical chips with the same through-silicon via arrangement can serve multiple functions by changing their orientation. The same chip design can form either serial or parallel signal transfer paths depending on whether it is stacked in its original orientation or rotated 180 degrees, thereby achieving signal transfer versatility without increasing design complexity
Solution Approach 2:
The patent employs asymmetric stacking orientation of identical chips to create different signal path configurations. By rotating alternate chips 180 degrees relative to their neighbors, the symmetric chip pattern generates asymmetric interconnections that form serial paths, while maintaining the ability to create parallel paths through different stacking arrangements, thus achieving adaptability without multiple chip designs
Data Source
AI summary
A stacked semiconductor device and a method of forming a serial path of the stacked semiconductor device are provided. The stacked semiconductor device includes a plurality of chips each having a first internal circuit for receiving an input signal, performing a designated operation and outputting an output signal. Each of the chips includes a serial bump disposed at the same position on one surface of each of the chips, receiving the input signal and transferring the input signal to the first internal circuit, and a serial through-silicon via (TSV) disposed at a position symmetrical to the serial bump with respect to a center of the chip to penetrate the chip, and receiving and transferring the output signal. Here, the chips are alternately rotated and stacked, so that the serial TSV and the serial bumps of adjacent chips contact each other. According to the stacked semiconductor device and method, a plurality of chips having the same pattern are rotated about the center of the chips and stacked, so that a parallel path and a serial path can be formed.