Non-Volatile Counter Layout Using Rotating Low-Word Storage
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Solution Overview
Problem
Non-volatile memory cells in electronic devices wear out quickly due to frequent programming and erasing, limiting the count of a counter implemented in non-volatile memory, especially when the least significant bit is updated frequently, leading to unreliable counts beyond a certain threshold.
Innovation Solution
Distribute the operations for storing a low word of a counter across multiple memory cells in a memory array and store additional bits in memory cells outside the array, with the location in the array determined by the upper bits, allowing for balanced wear across cells and using half-program cycles to extend the terminal count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a binary counter stores its value in memory cells using conventional methods, then the counter can be implemented with simple memory storage, but the memory cell storing the least significant bit wears out quickly due to frequent programming and erasing operations
Solution Approach 1:
The counter is divided into multiple segments: least significant bits stored in a first portion of memory cells and more significant bits stored in a second portion of memory cells. This segmentation allows different wear characteristics to be managed separately, with the first portion using half-program cycles to reduce wear while the second portion handles higher-order storage.
Solution Approach 2:
The system employs periodic full-program cycles to the first portion of memory cells at predetermined intervals, rather than programming every update. This periodic action reduces the average wear on memory cells in the first portion while maintaining counter functionality through the combination with the second portion.
2Measurement precision
If the least significant bit memory cell is programmed or erased for each count, then the counter can track each individual count accurately, but the memory cell wears out or becomes unreliable sooner than other memory cells
Solution Approach 1:
The counter bits are segmented across two portions of memory cells. The first portion stores least significant bits with reduced programming frequency (half-program cycles), while the second portion stores more significant bits. This segmentation preserves count accuracy through the combined value while extending the operational lifespan of individual memory cells in the first portion.
Solution Approach 2:
The system changes the programming parameter from full-program cycles to half-program cycles for the first portion of memory cells. This parameter change reduces the stress on individual memory cells while maintaining the ability to represent accurate count values through the combination of both memory portions.
3Reliability
If a counter uses non-volatile memory with limited program cycle capacity, then the counter can maintain data without power, but the terminal count is limited by the number of program cycles the memory cell can withstand
Solution Approach 1:
The counter is segmented into two portions stored in different memory cell groups. The first portion uses half-program cycles and periodic full-programming to extend individual cell lifespan, while the second portion stores additional bits. Together they achieve a terminal count that exceeds what a single memory cell could support while maintaining non-volatile retention.
Solution Approach 2:
The system merges two portions of counter storage with different programming characteristics. The first portion provides frequent updates with reduced wear through half-program cycles, while the second portion provides extended range capability. The combined system achieves both high terminal count capability and non-volatile retention.
Data Source
AI summary
A method for implementing a non-volatile counter using non-volatile memory is disclosed. In an embodiment, the method involves distributing operations for storing a low word of a counter in non-volatile memory across memory cells in a memory array in the non-volatile memory, and storing additional bits of the counter in the non-volatile memory in memory cells outside of the memory array, wherein the location in the memory array at which the low word is stored is determined for each count based on the upper bits of the counter.