Rotating Harmonic Rejection Mixer for High-Frequency RF Matching
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Solution Overview
Problem
Conventional harmonic rejection mixers face challenges in effectively rejecting harmonic frequencies introduced by non-sinusoidal local oscillator signals due to device mismatches and phase deviations, leading to power consumption and area inefficiencies, with realistic harmonic rejection performance limited to around 30-40 dB at high frequencies.
Innovation Solution
A rotating harmonic rejection mixer design that cyclically rotates the mixed signal through multiple gain stages, using a master clock signal to weight and combine outputs, reducing harmonic rejection issues by shifting device matching problems to lower frequency passive components and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple mixers with predetermined scaling factors are used to achieve harmonic rejection, then harmonic rejection performance is improved, but device complexity and power consumption increase significantly
Solution Approach 1:
The invention divides the harmonic rejection function into multiple mixer stages, each handling a specific frequency component. By segmenting the signal processing into discrete stages with specific scaling factors, the system achieves harmonic rejection without requiring all components to be perfectly matched, thus reducing overall device complexity while maintaining performance.
Solution Approach 2:
The invention uses dynamic scaling factors that can be adjusted based on operating conditions rather than fixed predetermined values. This dynamic approach allows the system to adapt to varying signal conditions and maintain harmonic rejection performance across different frequencies and power levels, reducing the need for complex fixed-component designs.
2Manufacturing precision
If device sizes are increased to reduce random mismatches, then manufacturing precision is improved, but area and power consumption increase by a factor of 4
Solution Approach 1:
Instead of using one large device, the invention segments the function across multiple smaller mixer stages. Each stage uses smaller devices with relaxed matching requirements, yet the collective output achieves the desired precision through the staged processing architecture, avoiding the need for large individual components.
Solution Approach 2:
The invention changes the operating parameters of each mixer stage, including scaling factors and phase relationships, to compensate for device mismatches. By adjusting these parameters, the system achieves accurate harmonic rejection without requiring perfectly matched large-sized devices, thus reducing area while maintaining precision.
3Manufacturing precision
If LO signals are kept exactly 180 degrees out of phase for ideal operation, then harmonic rejection is improved, but additional well-matched components are required increasing device complexity
Solution Approach 1:
The invention uses dynamic phase adjustment in each mixer stage rather than relying on fixed 180-degree phase relationships. This allows the system to achieve effective harmonic rejection even when perfect phase matching is difficult to maintain, reducing the need for additional well-matched components while preserving performance.
Solution Approach 2:
The staged architecture provides implicit feedback mechanisms where each stage processes the output of the previous stage. This allows errors in phase matching to be corrected or compensated in subsequent stages, reducing the stringency of phase matching requirements for individual components while maintaining overall system performance.
4Speed
If conventional harmonic rejection mixers operate at high LO frequencies, then signal processing capability is improved, but harmonic rejection performance degrades to 30-40 dB
Solution Approach 1:
The invention segments the frequency processing across multiple stages, each optimized for specific frequency ranges. This allows the system to maintain effective harmonic rejection even at high overall operating frequencies by distributing the processing burden and using appropriate scaling factors for each stage's frequency range.
Solution Approach 2:
The invention dynamically adjusts scaling factors and other parameters based on the operating frequency. This allows the system to optimize performance for high-frequency operation by changing parameters adaptively, maintaining harmonic rejection performance that would otherwise degrade at higher frequencies in conventional fixed-parameter designs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves improved harmonic rejection with reduced power and area consumption, allowing for dynamic control of harmonic rejection based on frequency, and provides better noise immunity and image rejection, while maintaining flexibility in receiver designs.
Implementation Method 1
the mixer typically multiplies the incoming wireless signal with a local oscillator signal to produce a signal that has spectral energy that is distributed at sums and differences of the local oscillator and incoming signal's frequencies
Implementation Method 2
a rotating switch to cyclically switch the mixed signal to a plurality of gain stages. Each gain stage may be weighted according to a predetermined value and an output of each gain stage may be added together to provide an output signal
Implementation Method 3
the outputs of each mixer stage are summed to provide a downconverted (or upconverted) output. Each mixer may operate at a phase difference from the other mixers, and each scaling factor that scales the incoming signal may be in accordance with a predetermined sinusoidal function
Data Source
AI summary
In one embodiment, the present invention includes a method for receiving a radio frequency (RF) signal and mixing the RF signal with a master clock to obtain a mixed signal, cyclically rotating the mixed signal to each of N gain stages for at least one cycle of the master clock, and summing the outputs of the N gain stages to provide an output signal.