Rotational Error Detection Code for Low-XOR Burst Protection
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Solution Overview
Problem
Existing error detection codes, such as CRC, require a large number of XOR operations to calculate check values, making them inefficient and costly in terms of hardware, while still needing to guarantee detection of burst errors.
Innovation Solution
A new error detection code is implemented that comprises multiple parts, each identifying message data bits for calculating error detection bits, with each part representing a rotation by the number of wires, allowing for efficient calculation and reduced hardware requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CRC code is used to guarantee detection of burst errors, then error detection reliability is improved, but hardware complexity and number of XOR operations increase
Solution Approach 1:
The patent divides the error detection code into multiple parts, where each part corresponds to a specific error detection bit and identifies specific message data bits for calculation. This segmentation allows the system to achieve reliable burst error detection while reducing the overall hardware complexity by organizing XOR operations in a structured, modular manner rather than using a monolithic CRC approach.
Solution Approach 2:
The patent introduces a rotational dimension to the code structure, where each part of the code represents a rotation of another part by a specific number of wires. This dimensional transformation enables the system to maintain error detection capability while reducing the depth of XOR gate trees from 8 gates deep to a more efficient structure, thereby reducing hardware complexity.
2Reliability
If CRC code is used to protect against burst errors, then error detection capability is improved, but number of XOR operations increases
Solution Approach 1:
The patent applies partial action by selecting only the necessary message data bits for each error detection bit calculation, rather than processing all bits. Each part of the code identifies specific bits that need to be XORed, reducing the total number of operations while maintaining sufficient error detection capability for burst errors.
Solution Approach 2:
The patent changes the parameters of the error detection code by using rotational relationships between code parts instead of traditional CRC polynomial-based approaches. This parameter transformation reduces the calculation depth and number of XOR operations required, improving productivity while maintaining error detection reliability.
3Reliability
If traditional CRC code is implemented, then burst error detection is guaranteed, but hardware resource consumption increases
Solution Approach 1:
The patent makes the code structure universal by using rotational relationships that work across different wire counts and message data lengths. The same rotational principle applies regardless of the specific hardware configuration, allowing the system to achieve burst error detection with reduced hardware resources while maintaining adaptability to different implementations.
Data Source
AI summary
A device comprising circuitry for determining a plurality of error detection bits for data to be written and read from a memory device over a plurality of wires. The plurality of error detection bits are determined in accordance with a code comprising a plurality of parts, each of which identify which bits of the message data are for use in calculating its associated error detection bits, and represent a rotation of another one of the parts of the code by the number of wires. Determining each error detection bit comprises performing XOR operations between the bits of the message data identified by the code. The circuity is configured to cause each of a plurality of subsets of the message data to be sent to the memory device over a different one of the plurality of wires; and cause the error detection bits to be sent to the memory device.