Rotational Interposer Alignment for Stacked Chip Yield

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Solution Overview

Problem

The existing methods for bonding semiconductor chips in stacked configurations face challenges in achieving high yield due to the statistical distribution of high and low yield areas, leading to poor functionality when wafers are bonded with relative rotation, resulting in low stacked chip yield.

Innovation Solution

Implementing substrates with built-in N-fold rotational symmetry and using a set of N interposers to test various rotational angles between substrates, allowing for the determination of the optimal rotational alignment that maximizes stacked chip yield by electrically connecting chips with specific rotational angles, thereby optimizing the bonding process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If substrates are bonded with a predetermined azimuthal orientation to ensure functional bonding, then the functionality of stacked chips is maintained, but the stacked chip yield is reduced due to statistical distribution of high and low yield areas

Engineering Contradiction:
Improvefunctionality of stacked chipsVSAvoidstacked chip yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces rotational flexibility to the bonding process by enabling substrates to be bonded at multiple azimuthal orientations (0°, 60°, 120°, 180°, 240°, 300°) rather than a fixed predetermined orientation. This dynamic approach allows the system to adapt to the statistical distribution of yield areas by selecting the optimal rotational alignment that maximizes stacked chip yield while maintaining functional bonding requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the bonding parameter from a fixed azimuthal orientation to multiple discrete rotational angles. By testing and selecting from six possible rotational orientations, the system optimizes the alignment between first and second substrates to maximize the overlap of high yield areas, thereby improving stacked chip yield without compromising functionality.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If multiple substrates are tested with different rotational angles using N interposers to identify optimal alignment, then the stacked chip yield is maximized, but the testing complexity and time increase

Engineering Contradiction:
Improvestacked chip yieldVSAvoidtesting apparatus complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the testing process into N discrete rotational configurations (where N=6 for 60° intervals), with each interposer representing a specific rotational angle. This segmentation allows the complex problem of optimizing substrate alignment to be broken down into manageable discrete tests, where each interposer enables testing of one specific rotational configuration independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces interposers as intermediary components that facilitate rotational alignment testing. Each interposer acts as a mediator that provides a specific rotational offset between the first and second substrates, enabling systematic testing of different azimuthal orientations without requiring complex rotational mechanisms during the bonding process itself.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If substrates are bonded without rotational optimization, then the bonding process is simple and fast, but the yield depression occurs due to misalignment of high and low yield areas

Engineering Contradiction:
Improvestacked chip yieldVSAvoidtesting and alignment time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent performs preliminary rotational alignment testing using N interposers before the actual substrate bonding process. By pre-determining the optimal azimuthal orientation through systematic testing of multiple rotational configurations, the system eliminates the need for complex real-time alignment adjustments during bonding, thereby maximizing yield while keeping the actual bonding process simple and fast.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8159247B2Yield enhancement for stacked chips through rotationally-connecting-interposer
Publication Date: 2012.04.17 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US8159247B2 patent drawing
  • US8159247B2 patent drawing
  • US8159247B2 patent drawing

AI summary

A set of first substrate and second substrate are manufactured with a built-in N-fold rotational symmetry around the center axis of each substrate, wherein N is an integer greater than 1. A set of N different interposers is provided such that an i-th interposer provides electrical connection between the first substrate and the second substrate with a rotational angle of (i−1)/N×2π. The first and second substrates are tested with each of the N different interposers therebetween. Once the rotational angle that provides the highest stacked chip yield is determined, the first and the second substrates can be bonded with an azimuthal rotation that provides the highest stacked chip yield.