Rough Silicon Buffer Layer for Lower RF Substrate Losses
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Solution Overview
Problem
Group III-V semiconductor devices with aluminum nitride buffer layers experience band bending at the silicon substrate interface, leading to the formation of a two-dimensional hole gas (2DHG) with high carrier mobility, resulting in low resistance and substrate losses, which reduces power added efficiency (PAE) when used for radiofrequency (RF) applications.
Innovation Solution
A rough buffer layer with a top and bottom surface roughness is introduced over the silicon substrate, comprising a semiconductor material like silicon, doped with elements such as carbon, magnesium, or arsenic, to scatter carriers and increase resistance, thereby compensating for the negative effects of the 2DHG and enhancing PAE.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an aluminum nitride buffer layer is used on silicon substrate, then the device structure is simplified and manufacturing is easier, but band bending occurs at the interface forming a two-dimensional hole gas with high carrier mobility, resulting in low resistance and substrate losses that reduce power added efficiency
Solution Approach 1:
A rough buffer layer comprising silicon and carbon is introduced as an intermediary layer between the silicon substrate and the aluminum nitride buffer layer. This rough buffer layer modifies the interface properties to reduce band bending and suppress two-dimensional hole gas formation, thereby reducing substrate losses while maintaining the simplified aluminum nitride buffer layer structure.
Solution Approach 2:
The interface between the buffer layer and silicon substrate is intentionally roughened rather than kept flat. This parameter change in surface morphology alters the electrical properties at the interface, reducing carrier mobility in the two-dimensional hole gas and increasing resistance to counteract substrate losses.
2Device complexity
If a flat buffer layer interface is used, then the manufacturing process is simpler, but carrier mobility is high at the interface leading to low resistance and reduced power added efficiency
Solution Approach 1:
The flat interface between the buffer layer and silicon substrate is replaced with a rough, curved interface. This curvature at the interface level changes the electrical field distribution and carrier transport properties, reducing carrier mobility and increasing resistance to improve power added efficiency.
3Power
If the buffer layer interface is made rough with silicon and carbon, then carrier scattering increases and resistance increases improving power added efficiency, but the manufacturing process becomes more complex
Solution Approach 1:
The rough buffer layer is formed as a composite material comprising silicon and carbon. This composite structure provides the desired rough interface morphology for carrier scattering while being deposited using standard metal organic chemical vapor deposition (MOCVD) processes, maintaining manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The rough buffer layer increases the overall resistance of the silicon substrate, reducing substrate losses and enhancing power added efficiency from 54% to 57% at 6 GHz, while also improving co-planar waveguide performance by increasing resistance from -0.51 dB to -0.45 dB.
Implementation Method 1
A rough buffer layer with a top and bottom surface roughness is introduced over the silicon substrate, comprising a semiconductor material like silicon, doped with elements such as carbon, magnesium, or arsenic, to scatter carriers and increase resistance
Data Source
AI summary
Various embodiments of the present application are directed towards a group III-V device including a rough buffer layer. The rough buffer layer overlies a silicon substrate, a buffer structure overlies the rough buffer layer, and a heterojunction structure overlies the buffer structure. The buffer structure causes band bending and formation of a two-dimensional hole gas (2DHG) in the rough buffer layer. The rough buffer layer includes silicon or some other suitable semiconductor material and, in some embodiments, is doped. A top surface of the rough buffer layer and/or a bottom surface of the rough buffer layer is/are rough to promote carrier scattering along the top and bottom surfaces. The carrier scattering reduces carrier mobility and increases resistance at the 2DHG. The increased resistance increases an overall resistance of the silicon substrate, which reduces substrate loses and increases a power added efficiency (PAE).