Semiconductor Chip Mounting via Rough Solder Intermetallic Bonding

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Solution Overview

Problem

The thermal stress during the mounting of semiconductor chips on carriers can damage the chips, and existing methods are costly and inefficient in achieving reliable electrical and thermal conductivity.

Innovation Solution

A method involving the deposition of solder material with a rough surface on the semiconductor chip, followed by pressing and heating to form a mechanical connection with a conductive carrier, utilizing a tunnel furnace for low-temperature processing to minimize thermal expansion and induce intermetallic phase formation for stable bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional mounting methods are used to achieve reliable electrical and thermal conductivity, then bonding reliability is improved, but thermal stress increases causing chip damage

Engineering Contradiction:
Improvebonding reliabilityVSAvoidthermal stress
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the temperature parameter by using a two-stage heating process: first heating to a lower temperature (e.g., 150-200°C) to form initial bonding, then heating to a higher temperature (e.g., 250-350°C) to form intermetallic compounds. This parameter change allows achieving reliable bonding while controlling thermal stress through staged temperature increase rather than direct high-temperature exposure.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies preliminary action by first forming a mechanical connection through pressing and initial heating before forming the intermetallic phase. The rough surface structure is created beforehand through deposition, and the initial bonding is established before the final high-temperature intermetallic formation, allowing the structure to adapt progressively to thermal stress.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If high gold content solder is used to ensure reliable bonding, then bonding reliability is improved, but manufacturing cost increases

Engineering Contradiction:
Improvebonding reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent uses composite solder materials that combine different metal elements (such as Sn-Ag-Cu or Sn-Zn-based alloys) to create a composite structure with rough surface morphology. This composite approach provides reliable bonding through intermetallic compound formation without requiring high gold content, thereby reducing material costs while maintaining or improving bonding reliability.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the compositional parameters of the solder material by using alternative alloy systems that form rough surfaces and intermetallic compounds effectively. This allows achieving reliable bonding through controlled intermetallic phase formation rather than relying on gold-rich compositions, significantly reducing manufacturing costs.

Inventive Principle:
Principle #35Parameter changes

3Strength

If high-temperature processing is used to form strong bonds, then bonding strength is improved, but thermal expansion increases causing stress and potential damage

Engineering Contradiction:
Improvebonding strengthVSAvoidthermal expansion
Core Design Contradiction:
StrengthVSTemperature

Solution Approach 1:

The patent applies preliminary action by first establishing mechanical contact and initial bonding at lower temperatures before proceeding to high-temperature intermetallic formation. The rough surface structure is prepared in advance, and the bonding process is initiated at moderate temperatures, allowing the system to adapt to thermal changes gradually and reducing thermal expansion stress.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes phase transitions of the solder material, specifically the formation of intermetallic compounds through controlled heating. The rough surface structure facilitates this phase transition process, allowing strong bonding to form through intermetallic compound creation at controlled temperature stages rather than requiring sustained high-temperature processing, thereby reducing overall thermal expansion.

Inventive Principle:
Principle #36Phase transitions

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces thermal stress, ensures reliable mechanical and electrical bonding, and lowers production costs by minimizing the need for high gold content in solder, while maintaining high mechanical stability and thermal conductivity.

Implementation Method 1

heating to a temperature above a melting point of the solder material to melt the solder material

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 2

A rough surface of the layer of the solder material may be utilized to increase a surface area of the solder material

Methodology Applied
Scientific EffectMechanical interlocking: Mechanical Fastener

Implementation Method 3

The semiconductor chip may be pressed on the carrier with an applied pressure

Methodology Applied
Scientific EffectCompression: Compression

Data Source

PatentUS9034751B2Method for mounting a semiconductor chip on a carrier
Publication Date: 2015.05.19 INFINEON TECHNOLOGIES AG
  • US9034751B2 patent drawing
  • US9034751B2 patent drawing
  • US9034751B2 patent drawing

AI summary

A method includes providing a semiconductor chip having a first main surface and a layer of solder material deposited on the first main surface, wherein the layer of solder material has a roughness of at least 1 μm. The semiconductor chip is placed on a carrier with the first main surface of the semiconductor chip facing the carrier. The semiconductor chip is pressed on the carrier with a pressure of at least 1 Newton per mm2 of surface area of the first main surface and heat is applied to the solder material.