Roughened Conductive Posts for Stable Semiconductor Package Bonding
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Solution Overview
Problem
Existing semiconductor packages face challenges in ensuring reliable connection and structural stability, particularly as the demand for compact, multi-functional, and highly integrated semiconductor chips increases.
Innovation Solution
A semiconductor package design that includes a first and second wiring structure, a semiconductor chip between them, a molding layer encapsulating the chip, and conductive posts for electrical connection. The conductive posts feature a body extending through the molding layer and a bonding surface with increased roughness, including protrusions and recesses, to enhance bonding with the molding layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a conventional conductive post with smooth surfaces is used, then the manufacturing process is simple, but the bonding force between the conductive post and molding layer is insufficient
Solution Approach 1:
The conductive post is designed with non-uniform surface roughness: the side surface has greater roughness to enhance bonding with the molding layer, while the upper and lower surfaces maintain smaller roughness for reliable electrical connection. This local differentiation of surface properties optimizes both bonding strength and electrical conductivity without requiring complete surface restructuring.
Solution Approach 2:
The bonding surface is prepared in advance by forming protrusions and recesses on the side surface of the conductive post before final assembly. This preliminary surface preparation ensures that when the molding layer is formed, the enhanced bonding interface is already in place, improving adhesion without requiring additional processing steps later.
2Reliability
If the bonding surface roughness is increased to improve bonding, then delamination is reduced, but the manufacturing precision requirement increases
Solution Approach 1:
The surface roughness of the conductive post is controlled within specific parameter ranges: the side surface has greater roughness (first roughness parameter) for bonding, while upper and lower surfaces have smaller roughness (second roughness parameter) for electrical connection. By defining and controlling these parameters, the invention achieves reliable bonding without excessive manufacturing complexity.
3Stability of the object's composition
If a smooth conductive post is used, then manufacturing is easier, but stress distribution and structural stability are poor
Solution Approach 1:
The conductive post features localized surface modifications only where needed: protrusions and recesses are formed on the side surface to enhance bonding with the molding layer, while keeping upper and lower surfaces relatively smooth for electrical connections. This selective surface treatment improves structural stability without complicating the overall manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves the structural stability and reliability of the semiconductor package by increasing the bonding force between the conductive posts and the molding layer, reducing delamination, and enhancing the overall stress distribution.
Implementation Method 1
a bonding surface on a side surface of the body and having a greater roughness than an upper surface and a lower surface of the conductive post
Data Source
AI summary
A semiconductor package includes: a first wiring structure including at least one first wiring pattern and a first insulating layer including the first wiring pattern therein; a second wiring structure including at least one second wiring pattern and a second insulating layer including the second wiring pattern therein; a semiconductor chip between the first wiring structure and the second wiring structure; a molding layer between the first wiring structure and the second wiring structure, the molding layer comprising the semiconductor chip therein; and a conductive post penetrating the molding layer and configured to electrically connect the first wiring structure to the second wiring structure, wherein the conductive post includes: a body extended through the molding layer in a vertical direction; and a bonding surface on a side surface of the body and having a greater roughness than an upper surface and a lower surface of the conductive post.


