Roughened Wiring Surfaces for Semiconductor Resin Adhesion

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Solution Overview

Problem

The adhesion between leads and sealing resin in semiconductor devices is prone to peeling, which affects the reliability and performance of the devices.

Innovation Solution

A semiconductor device design featuring a resin layer, a mounting wiring layer with rough surfaces, and a semiconductor element with connected element wiring layers, where the rough surfaces enhance the adhesion of the sealing resin, preventing peeling through improved anchor effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If smooth surfaces are used for mounting wiring and element wiring, then manufacturing process is simpler, but adhesion between wiring layers and sealing resin is poor causing peeling

Engineering Contradiction:
Improveadhesion between wiring layers and sealing resinVSAvoidsurface treatment complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent changes the surface roughness parameter of the mounting wiring and element wiring from smooth to rough surfaces. This parameter change increases the adhesion strength between the wiring layers and sealing resin by providing a larger contact area and mechanical interlocking effect, thereby preventing peeling while maintaining manufacturing feasibility.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If rough surfaces are created on mounting wiring and element wiring, then adhesion and anti-peeling performance improve, but manufacturing process becomes more complex

Engineering Contradiction:
Improveanti-peeling performanceVSAvoidwiring layer fabrication
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent modifies the surface roughness parameter during the wiring layer formation process. By controlling the plating or deposition conditions, the wiring layers are formed with inherently rough surfaces that provide excellent adhesion to the sealing resin, achieving high reliability without requiring separate surface treatment steps.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent combines the wiring layer formation process with the surface roughening process into a single integrated manufacturing step. The rough surface is created as an inherent characteristic of the wiring layer during plating or deposition, eliminating the need for separate surface treatment operations and maintaining ease of manufacture.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The enhanced adhesion between the mounting wiring and element wiring layers and the sealing resin improves the reliability of the semiconductor device by reducing peeling and ensuring better electrical connectivity.

Implementation Method 1

the adhesion between the leads and the sealing resin may be a cause of peeling which occurs between the leads and the sealing resin

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

the mounting wiring main surface and the element wiring main surface are rough surfaces having a larger surface roughness than the mounting wiring back surface

Methodology Applied
Scientific EffectSurface roughness: Abrasion

Data Source

PatentUS20230091632A1Semiconductor device and method of manufacturing semiconductor device
Publication Date: 2023.03.23 ROHM CO LTD
  • US20230091632A1 patent drawing
  • US20230091632A1 patent drawing
  • US20230091632A1 patent drawing

AI summary

A semiconductor device includes: a resin layer having a resin main surface; a mounting wiring layer arranged on the resin main surface, and having a mounting wiring main surface facing the same side as the resin main surface and a mounting wiring back surface facing the side of the resin main surface; a semiconductor element including an element wiring layer which is mounted on the mounting wiring main surface, has an element wiring main surface facing the side of the resin layer, and is connected to the mounting wiring layer; and a sealing resin which seals the mounting wiring layer and the semiconductor element, wherein the mounting wiring main surface and the element wiring main surface are rough surfaces having a larger surface roughness than the mounting wiring back surface.