Rounded Recessed Fin Structure for Low-Capacitance FinFET Source/Drain

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Challenges in semiconductor manufacturing arise from the development of three-dimensional designs like FinFETs, particularly in forming source/drain regions with epitaxial growth, where issues such as void formation and parasitic capacitance affect device performance and efficiency.

Innovation Solution

The formation of recessed fin structures with rounded corners in FinFETs, utilizing epitaxial growth methods to create source/drain structures with voids, which reduces parasitic capacitance and enhances carrier mobility by adjusting the epitaxial growth process through controlled etching techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional epitaxial growth methods are used to form source/drain regions, then device density and performance are improved, but void formation occurs and parasitic capacitance increases

Engineering Contradiction:
Improvedevice performanceVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies curvature by forming rounded corners at the intersections of the fin structure and source/drain regions. This is achieved through a multi-step etching process that includes anisotropic etching to create the initial recessed structure, followed by isotropic etching to round the corners. The rounded geometry eliminates sharp corners that would otherwise concentrate electric fields and increase parasitic capacitance, while the curved surfaces facilitate better epitaxial growth and reduce void formation.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent segments the source/drain region formation into distinct stages: first forming recessed fin structures with controlled depths, then creating rounded corners through sequential etching steps, and finally performing epitaxial growth. This segmentation allows precise control over the geometry to optimize both device performance and minimize parasitic effects.

Inventive Principle:
Principle #1Segmentation

2Productivity

If three-dimensional FinFET structures are implemented, then device density increases, but manufacturing complexity and process challenges increase

Engineering Contradiction:
Improvedevice densityVSAvoidstructure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent transitions from planar two-dimensional source/drain regions to three-dimensional recessed fin structures with rounded corners. This dimensional change increases device density by utilizing vertical space more effectively while the controlled rounding of corners simplifies the manufacturing process by eliminating sharp geometric features that are difficult to fabricate and that would increase parasitic capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If sharp-cornered recessed fin structures are formed, then epitaxial growth is facilitated, but parasitic capacitance increases due to corner effects

Engineering Contradiction:
Improveepitaxial growthVSAvoidparasitic capacitance
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent resolves this contradiction by implementing rounded corners that facilitate epitaxial growth while eliminating the corner effects that increase parasitic capacitance. The curved geometry provides continuous growth fronts for epitaxial deposition and eliminates the electric field concentration at sharp corners.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves the properties of the source/drain epitaxial layer, reducing parasitic capacitance and enhancing carrier mobility, thereby improving the performance and efficiency of semiconductor devices.

Implementation Method 1

sources and drains are formed by using an epitaxial growth method

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

controlled etching techniques

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS20250331224A1A semiconductor device for recessed fin structure having rounded corners and method of manufacturing thereof
Publication Date: 2025.10.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250331224A1 patent drawing
  • US20250331224A1 patent drawing
  • US20250331224A1 patent drawing

AI summary

In a method of manufacturing a semiconductor device including a Fin FET, a fin structure extending in a first direction is formed over a substrate. An isolation insulating layer is formed over the substrate so that an upper portion of the fin structure is exposed from the isolation insulating layer. A gate structure extending in a second direction crossing the first direction is formed over a part of the fin structure. A fin mask layer is formed on sidewalls of a source/drain region of the fin structure. The source/drain region of the fin structure is recessed. An epitaxial source/drain structure is formed over the recessed fin structure. In the recessing the source/drain region of the fin structure, a plasma process combining etching and deposition processes is used to form a recess having a rounded corner shape in a cross section along the second direction.