Routable Leadframe IC Package Layout Without Bonding Wires
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Solution Overview
Problem
Leaded integrated circuit (IC) packages face issues such as wire-sweeping, cross die bonding, the cost and application challenges of inter-lead lock tape, and undesirable floating leads, leading to short circuits due to increased bonding wire length and complexity.
Innovation Solution
The use of routable leadframe technology, which involves depositing a metal layer with metal traces and pillars on a carrier, patterning photoresist, forming a dielectric layer, and attaching a die to expose metal pillars for direct connection, eliminating the need for bonding wires and inter-lead lock tape, and allowing leads to extend beyond the mold compound for secure connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of pins on the die increases and the die size decreases, then the integration density is improved, but the bonding wire length increases causing wire-sweeping and short circuits
Solution Approach 1:
The patent extracts and eliminates the bonding wires from the system by implementing direct metal-to-metal connections through vias and conductive paths in the leadframe, replacing the wire-bonding approach with a rigid metallurgical connection structure
Solution Approach 2:
The patent introduces an intermediary metal layer with vias and conductive traces that mediates the connection between die pins and leadframe leads, eliminating the need for flexible bonding wires while maintaining electrical connectivity
2Reliability
If bonding wires are used to connect die pins to leads, then electrical connection is achieved, but wire displacement and short circuits occur during mold compound application
Solution Approach 1:
The patent segments the electrical connection path into discrete rigid components (metal vias, conductive traces, leadframe leads) rather than using continuous flexible wires, making each segment stable and resistant to displacement during molding
Solution Approach 2:
The patent provides beforehand cushioning by creating a rigid, mold-compound-resistant connection structure that is immune to the displacing forces applied during molding, preventing wire-sweeping issues before they can occur
3Adaptability or versatility
If bonding wires cross over each other to connect pins on opposite sides of the die, then pin-to-lead connectivity is achieved, but cross-die bonding causes short circuits
Solution Approach 1:
The patent transitions from two-dimensional wire routing on the die surface to three-dimensional vertical connections through vias and layered conductive paths, allowing pins on opposite sides to connect without horizontal wire crossing
Solution Approach 2:
The patent extracts the problematic wire-crossing element entirely by replacing it with vertical via connections and planar conductive traces that eliminate the need for wires to cross over each other in space
4Stability of the object's composition
If inter-lead lock tape is used to secure bonding wires, then wire displacement is prevented, but manufacturing cost increases
Solution Approach 1:
The patent extracts and eliminates the need for inter-lead lock tape by removing the bonding wires themselves, replacing them with a rigid metal connection structure that is inherently stable without requiring additional securing materials
Solution Approach 2:
The patent replaces the expensive and complex inter-lead lock tape process with a simpler, more cost-effective metallurgical connection approach using standard leadframe fabrication techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces bonding wire length, eliminates short circuits, eliminates the need for inter-lead lock tape, and enables more functionality in a smaller IC package size by reducing dedicated leads for power and ground, while preventing wire-sweeping and cross die bonding.
Implementation Method 1
depositing a metal layer with metal traces and pillars on a carrier
Implementation Method 2
A photoresist material layer is patterned on the leads of the metal layer
Data Source
AI summary
A method of fabricating an electronic device includes depositing a metal layer having external leads on a carrier. A photoresist material layer is patterned on the leads. A dielectric layer is formed over the metal layer such that surfaces of metal pillars from the metal layer are exposed. The photoresist material layer is removed from the leads, and the dielectric layer and the metal layer are removed from the carrier. A die is attached to the first surface of the dielectric layer. The die includes contacts on a surface of the die that contacts the dielectric layer such that the contacts are aligned with and connect to the exposed surfaces of the metal pillars. A mold compound is formed over the die, the dielectric layer, the metal traces, and the metal pillars of the metal layer, but not over the leads of the metal layer.