Router Lookup Circuit Using Non-Volatile Memory for Fast Address Mapping
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional network routers face challenges in achieving high-speed, low-latency data processing and memory retention due to reliance on volatile memory technologies like DRAM or SRAM, which are susceptible to data loss during power outages and have limited capacity for parallel address-mapping operations.
Innovation Solution
The implementation of a programmable network router device utilizing two-terminal non-volatile memory cells, such as resistive-switching memory, which provides high on/off current ratios and fast switching speeds, enabling efficient storage and retrieval of network addresses and associated port mappings, and resistance to power loss through programmable logic circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If volatile memory technologies like DRAM or SRAM are used for network address storage, then fast data access speed is achieved, but data loss occurs during power outages and memory capacity is limited
Solution Approach 1:
The patent segments the memory system into two distinct parts: volatile memory (DRAM/SRAM) for high-speed data access and non-volatile memory for data retention. This segmentation allows each memory type to perform its optimal function - the volatile memory provides nanosecond-level access speeds while the non-volatile memory ensures data persistence during power outages, thereby resolving the contradiction between speed and reliability.
Solution Approach 2:
The patent introduces a dual-memory architecture where non-volatile memory acts as an intermediary backup for the volatile memory. When power is lost, the non-volatile memory maintains the network address data, preventing data loss. This intermediary non-volatile memory component mediates between the speed requirements of the volatile memory and the reliability requirements of data retention.
2Productivity
If conventional volatile memory is used for address-mapping operations, then fast lookup is achieved, but parallel processing capacity is limited
Solution Approach 1:
The patent transitions from a single-dimension volatile memory architecture to a two-dimensional memory system incorporating both volatile and non-volatile memory layers. This dimensional expansion enables parallel address-mapping operations by allowing multiple memory access patterns simultaneously - fast sequential access through volatile memory and persistent storage access through non-volatile memory, thereby increasing parallel processing capacity while maintaining lookup speed.
3Reliability
If non-volatile memory is used for network address storage, then data retention during power loss is achieved, but access speed is reduced
Solution Approach 1:
The patent implements preliminary action by pre-loading network address data into the volatile memory from non-volatile memory before power loss occurs. During normal operation, the volatile memory maintains the active address data for fast access. This preliminary preparation ensures that when power is restored after an outage, the system can quickly resume high-speed operations without needing to re-load data from slower non-volatile memory, thus mitigating the speed penalty of using non-volatile memory.
4Quantity of substance
If larger memory capacity is provided for network addresses, then more addresses can be stored, but hardware footprint increases
Solution Approach 1:
The patent applies local quality by assigning different memory types to different functional requirements within the same memory system. High-capacity non-volatile memory is used specifically for persistent address storage where speed is less critical, while smaller, faster volatile memory is used for active address lookup operations. This localized optimization allows the system to achieve large total capacity without proportionally increasing the hardware footprint, as each memory type is sized appropriately for its specific function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables rapid data packet processing with lookup times of several nanoseconds, resistance to power loss, and increased memory density, facilitating efficient network routing with reduced hardware footprint and improved reliability.
Implementation Method 1
two-terminal non-volatile memory cells, such as resistive-switching memory, which provides high on/off current ratios and fast switching speeds
Implementation Method 2
resistive-switching memory, which provides high on/off current ratios and fast switching speeds
Data Source
AI summary
A non-volatile programmable circuit configurable to perform logic functions, is provided. The programmable circuit can employ two-terminal non-volatile memory devices to store information, thereby mitigating or avoiding disturbance of programmed data in the absence of external power. Two-terminal resistive switching memory devices having high current on/off ratios and fast switching times can also be employed for high performance, and facilitating a high density array. For look-up table applications, input/output response times can be several nanoseconds or less, facilitating much faster response times than a memory array access for retrieving stored data.