Routing Conflict Identification in Circuit Placement
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Solution Overview
Problem
In the context of iterative implementation flows for circuit designs in Electronic Design Automation, the limited routing connectivity of programmable logic devices poses challenges, particularly during the placement phase, as not all wires can connect to each other due to constraints in programmable interconnect points, leading to routing conflicts that conventional placers fail to address.
Innovation Solution
A method is introduced to identify routing conflicts in empty sites of a target device by analyzing routing information represented as a directed acyclic graph, determining blockages, and generating a list of sites with conflicts to exclude them from placement, ensuring that no circuit elements are assigned to these sites, thus avoiding infeasible circuit designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional placers are used to place circuit elements, then placement speed is maintained, but routing conflicts are not addressed leading to infeasible circuit designs
Solution Approach 1:
The patent performs preliminary analysis of routing information before the placement phase to identify potential routing conflicts. By analyzing the routing graph and identifying sites with insufficient programmable interconnect points beforehand, the system prevents infeasible placements before they occur, rather than detecting conflicts during or after placement.
Solution Approach 2:
The patent introduces an intermediary analysis step between the placement phase and routing phase. This intermediary step examines routing information and identifies sites with routing conflicts, acting as a mediator that prevents placement of circuit elements at sites that would lead to infeasible routing, thus bridging the gap between placement and routing feasibility.
2Adaptability or versatility
If all empty sites are considered for placement, then placement options are maximized, but sites with routing conflicts are included leading to infeasible implementations
Solution Approach 1:
The patent applies local quality by differentiating empty sites based on their routing characteristics. Instead of treating all empty sites uniformly, the system identifies and excludes specific sites (such as I/O sites) that have insufficient programmable interconnect points, while maintaining placement flexibility at other sites that do have adequate routing resources.
Data Source
AI summary
A method of implementing a circuit design in a target device can include identifying routing information for a circuit design that has been at least partially implemented. A plurality of empty sites of the target device within which the circuit design is to be implemented can be identified. The method also can include determining whether each of the plurality of empty sites of the target device has a routing conflict according to the routing information of the circuit design and generating a list specifying each empty site of the target device that has a routing conflict.