Routing Multiplexer Circuit for Low-Power PLD Switching

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Solution Overview

Problem

Existing low-power routing multiplexers in deep sub-micron devices face challenges in reducing both static and dynamic power consumption without significantly increasing the size of programmable logic devices (PLDs), as previous methods either reduce speed or enlarge the device.

Innovation Solution

The proposed solution involves splitting the first stage of the routing driver input multiplexer into two halves with different trip points to reduce short-circuit currents, cutting off transistors to minimize leakage currents, reducing voltage swing, and recycling charge, while allowing control signals to adjust operating modes between high-speed and low-speed modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the DIM is turned off when not in use to reduce static power consumption, then power consumption is reduced, but the device becomes less responsive when activation is needed

Engineering Contradiction:
Improvestatic power consumptionVSAvoidresponse speed
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The patent implements dynamic power management by allowing the DIM to switch between active and inactive states based on operational needs. The control logic dynamically activates the DIM only when routing operations are required, reducing static power consumption during idle periods while maintaining fast response capability when activation is needed.

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If the voltage swing of the DIM is reduced to reduce dynamic power consumption, then power consumption is reduced, but the speed of the DIM is also reduced

Engineering Contradiction:
Improvedynamic power consumptionVSAvoidDIM speed
Core Design Contradiction:
Loss of energyVSSpeed

Solution Approach 1:

The patent employs parameter changes by adjusting the voltage swing characteristics of the DIM based on operational requirements. The system can modify voltage levels and swing ranges to optimize the balance between power consumption and speed performance, allowing reduced voltage swing during low-performance periods to save power while maintaining full voltage swing when high speed is needed.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If the size of each DIM is increased to implement power reduction techniques, then power consumption is reduced, but the overall size of the PLD increases

Engineering Contradiction:
Improvepower consumptionVSAvoidPLD size
Core Design Contradiction:
Loss of energyVSArea of stationary object

Solution Approach 1:

The patent merges multiple power reduction techniques into a unified control framework that manages multiple DIMs within the PLD. By combining shutdown control, voltage swing reduction, and operational mode management into an integrated system, the patent achieves significant power reduction without requiring individual DIMs to be enlarged, thus avoiding overall PLD size increase.

Inventive Principle:
Principle #5Merging (Combining)

4Loss of energy

If multiple power reduction techniques are implemented in the DIM, then power consumption is reduced, but the complexity of the DIM increases

Engineering Contradiction:
Improvepower consumptionVSAvoidDIM complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent implements a universal control framework that manages multiple power reduction techniques through a single integrated control logic. This multi-functional approach allows the same control structure to handle shutdown decisions, voltage swing adjustment, and operational mode selection, reducing the overall complexity that would result from separate control circuits for each technique.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7982501B2Low-power routing multiplexers
Publication Date: 2011.07.19 ALTERA CORP
  • US7982501B2 patent drawing
  • US7982501B2 patent drawing
  • US7982501B2 patent drawing

AI summary

Low-power routing multiplexers that reduce static and dynamic power consumption are provided. A variety of different techniques are used to reduce power consumption of the routing multiplexers without significantly increasing their size. For example, power consumption of the routing multiplexers may be reduced by reducing short-circuit currents, reducing leakage currents, limiting voltage swing, and recycling charge within the multiplexer. Multiple power reduction techniques may be combined into a single routing multiplexer design. Low-power routing multiplexers may also be designed to operate in selectable modes, such as, a high-speed, high-power mode and a low-speed, low-power mode.