Routing Patch Architecture for High-Bandwidth Package I/O
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Solution Overview
Problem
Current semiconductor package substrates face challenges in meeting increasing off-package network bandwidth requirements due to copper density uniformity issues, adhesion problems, and size increases, which result in higher costs and form factor issues, especially when using skip layers and smoother copper traces to reduce skin effect.
Innovation Solution
The implementation of a high-speed, high-bandwidth routing patch external to the package substrate, which uses low-loss dielectrics and thicker dielectric layers without skip layers, providing pitch translation and minimizing signal losses by routing signals through a substantially vertical path, and allowing for modular configuration and easier upgrades.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If skip layers are used to increase dielectric thicknesses, then transmission loss is reduced, but copper density uniformity deteriorates
Solution Approach 1:
The package substrate is divided into multiple routing layers with standard dielectric thicknesses, avoiding the need for skip layers. The routing is segmented across layers 1-4 with consistent dielectric spacing, maintaining copper density uniformity while providing adequate signal routing paths.
Solution Approach 2:
The patent uses a multi-layer routing architecture where signals are routed through additional vertical layers rather than increasing horizontal dielectric thickness. This allows achieving low transmission loss through optimized layer stacking and routing paths without requiring skip layers that would disrupt copper density uniformity.
2Loss of energy
If copper traces are formed with lower surface roughness to reduce skin effect, then transmission loss is reduced, but adhesion deteriorates
Solution Approach 1:
The patent optimizes copper trace surface roughness parameters to achieve a balance between reducing skin effect and maintaining adhesion. By controlling the RMS roughness within specific ranges and using optimized plating processes, the design achieves low transmission loss while preserving adequate adhesion strength.
Solution Approach 2:
The patent employs composite copper trace structures with controlled surface characteristics. The copper traces are formed with specific surface treatments that create a composite structure maintaining bulk electrical conductivity while optimizing surface properties for both low skin effect and good adhesion to dielectric layers.
3Productivity
If package size is increased to accommodate more lanes and higher speeds, then bandwidth capacity is improved, but cost and form factor deteriorate
Solution Approach 1:
The patent achieves increased bandwidth capacity by utilizing vertical layering (3D routing architecture) rather than expanding horizontal package area. Multiple routing layers with pitch translation allow more signal lanes to be packed vertically, increasing bandwidth capacity while maintaining compact package footprint.
Solution Approach 2:
The patent optimizes routing parameters including trace pitch, layer spacing, and dielectric thickness to maximize bandwidth capacity within a fixed package area. By adjusting these parameters and using advanced routing techniques, the design achieves high bandwidth without proportionally increasing package dimensions.
4Productivity
If more routing layers are added to meet bandwidth requirements, then signal capacity is improved, but manufacturing complexity increases
Solution Approach 1:
The patent employs standardized routing layer designs that can be reused across different package configurations. The multi-layer routing architecture uses consistent dielectric thicknesses, standard trace patterns, and modular pitch translation structures that can be adapted to various bandwidth requirements without redesigning the entire routing system.
Solution Approach 2:
The patent manages routing architecture complexity by optimizing the number of routing layers and their configuration. By carefully selecting dielectric thicknesses, trace pitches, and layer assignments, the design achieves high signal capacity while keeping the routing architecture manageable for manufacturing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution simplifies package substrate manufacturing, maintains copper density uniformity, reduces signal losses, and allows for flexible upgrades by decoupling SERDES routing from the substrate, thereby addressing the challenges of increasing bandwidth demands while minimizing costs and form factor issues.
Implementation Method 1
the copper traces may be formed with a lower surface roughness in order to reduce the skin effect
Implementation Method 2
packages may be formed with low loss dielectrics that have greater dielectric thicknesses between metal layers
Data Source
AI summary
Embodiments disclosed herein include electronic packages. In an embodiment, an electronic package comprises a package substrate, wherein the package substrate comprises a first routing architecture. In an embodiment, the electronic package further comprises a first die on the package substrate, a second die on the package substrate, wherein the first die is electrically coupled to the second die by a bridge embedded in the package substrate, and a routing patch on the package substrate. In an embodiment, the routing patch is electrically coupled to the second die, and wherein the routing patch comprises a second routing architecture that is different than the first routing architecture.