Row Decoder Adjacent Block Selection for Leakage Detection
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in detecting leakage currents effectively, particularly due to manufacturing defects that cause short circuits between word lines and selection gate lines, which interfere with normal device operation.
Innovation Solution
The semiconductor memory device incorporates a leakage detection circuit and a row decoder configuration that allows for the selection of adjacent memory blocks during leakage detection, generating a potential difference between word lines to detect any leakage current efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional row decoder is used without adjacent block selection capability, then the device complexity is low, but the ability to detect leakage currents is insufficient
Solution Approach 1:
The row decoder is configured in advance to be capable of selecting adjacent memory blocks before leakage detection is performed. This preliminary configuration enables the application of potential differences across word lines during the detection phase, allowing leakage currents to be measured without requiring complex additional circuitry during the detection process itself.
Solution Approach 2:
The row decoder is designed to perform multiple functions: normal memory block selection during operation and adjacent block selection during leakage detection. This multi-functionality allows the same decoder circuitry to serve both operational and diagnostic purposes, improving leakage detection capability without proportionally increasing device complexity.
2Measurement precision
If adjacent memory blocks are selected during leakage detection, then leakage current detection precision is improved, but the operation time increases
Solution Approach 1:
The leakage detection process utilizes periodic selection of adjacent memory blocks through the row decoder. By systematically selecting different adjacent blocks in a structured sequence, the system can comprehensively detect leakage currents across multiple word lines while maintaining an organized and efficient detection rhythm, reducing overall detection time compared to random or unstructured approaches.
3Measurement precision
If potential difference is applied between word lines for leakage detection, then detection sensitivity is improved, but the risk of interfering with normal operation increases
Solution Approach 1:
The leakage detection function is extracted as a separate, dedicated operation from the normal memory read/write operations. During leakage detection, the row decoder is specifically configured to select adjacent blocks and apply potential differences, while normal memory operations are suspended. This separation ensures that the aggressive potential difference application for detection purposes does not interfere with or compromise the stability of normal memory operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient detection of leakage currents, ensuring the normal operation of the memory device by identifying and addressing potential short circuits between memory blocks.
Implementation Method 1
detecting a leakage current in the memory cell array
Data Source
AI summary
A memory device includes a plurality of memory blocks, and a row decoder including a plurality of decoders including a first decoder and a second decoder, the first decoder being configured to output a first block selection signal for selecting one of the memory blocks and a control signal for causing the second decoder to output a second block selection signal for selecting another one of the memory blocks.