Optical Sensor Row Driver Fault Detection with Shared Comparator
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Solution Overview
Problem
Conventional fault detection circuitry for optical sensor ICs is inefficient in terms of area usage, power consumption, and manufacturing complexity, and often fails to detect certain types of faults in row driver circuits.
Innovation Solution
Implementing level-based fault detection systems that include dedicated and shared circuitry for individual row drivers, using transistors to optimize area and power usage, and sharing comparator and scaling functions across multiple rows to minimize resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fault detection circuitry is used for optical sensor ICs, then fault detection capability is provided, but area usage is excessive and power consumption is high
Solution Approach 1:
The patent combines multiple fault detection functions into a single shared comparator circuit that serves multiple row drivers. The comparator is time-multiplexed to detect faults in different row drivers sequentially, eliminating the need for separate comparator circuits for each row driver and significantly reducing the total area required for fault detection circuitry.
Solution Approach 2:
The fault detection system is designed with universal components that can detect multiple types of faults (stuck-at-0, stuck-at-1, stuck-open) across multiple row drivers using a single comparator and scaling circuit. The system uses level-based detection that adapts to different voltage levels, providing multi-functional fault detection capability with minimal hardware.
2Reliability
If conventional fault detection circuitry is used for optical sensor ICs, then fault detection capability is provided, but power consumption is excessive
Solution Approach 1:
The fault detection system operates periodically rather than continuously, with the comparator and scaling circuit being activated only when needed for fault detection. The system uses phased operation where different row drivers are detected in sequence, allowing the circuitry to remain idle or in low-power states between detection cycles, thereby significantly reducing overall power consumption.
3Reliability
If conventional fault detection circuitry is used for optical sensor ICs, then some fault detection is provided, but manufacturing complexity is high and certain faults are undetected
Solution Approach 1:
The patent implements level-based fault detection that adapts to different voltage levels by dynamically adjusting reference levels. The system detects faults by comparing signal levels against adaptive thresholds, enabling detection of stuck-at-0, stuck-at-1, and stuck-open faults across varying operational conditions without requiring complex dedicated circuitry for each fault type.
4Measurement precision
If dedicated circuitry is used for each row driver, then fault detection accuracy is improved, but area usage and device complexity increase
Solution Approach 1:
The patent segments the fault detection process into distinct phases and time slots for different row drivers, while using shared hardware resources. Each row driver receives dedicated attention during its assigned time slot with the shared comparator and scaling circuit, providing accurate fault detection for each row without requiring physically dedicated circuitry for each one, thus maintaining precision while minimizing area.
Data Source
AI summary
An illustrative fault detection system may include an input node, a transport circuit, and a comparison circuit. The input node may electrically connect to a row driver that produces, on the input node, a row driver voltage having one of a plurality of analog voltage levels. The transport circuit may be configured to transport, when the row driver is selected from a plurality of row drivers, the row driver voltage to a monitoring node shared by a plurality of fault detection systems including the fault detection system. The comparison circuit may be shared by the plurality of fault detection systems and may be configured to generate a digital output by conditioning a voltage from the monitoring node, performing a comparison between the conditioned voltage and a reference voltage, and latching the digital output based on the comparison. Corresponding systems, integrated circuits, and methods are also disclosed.