Row Hammer Refresh Address Tracking with High-Low Registers
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Solution Overview
Problem
Existing methods for obtaining row hammer addresses in semiconductor memory are either inaccurate or require complex circuit structures and large chip areas, as they either randomly select or count each complete row address, leading to inefficiencies and increased resource consumption.
Innovation Solution
A method and device that utilize high and low registers to track access frequencies of row addresses, locking high addresses with high frequencies and updating low addresses accordingly, allowing for accurate identification of row hammer refresh addresses with a simpler circuit design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If random selection method is used to obtain row hammer address, then the method is simple, but the accuracy is not high
Solution Approach 1:
The patent implements a feedback mechanism by continuously monitoring access frequencies of row addresses and using this information to dynamically adjust refresh operations. The system counts how many times each row address is accessed and uses this feedback to identify candidate row hammer addresses that require refresh, thereby improving accuracy while maintaining reasonable complexity.
Solution Approach 2:
The system performs self-monitoring of row address access patterns without requiring external intervention. By automatically counting access frequencies and identifying candidate addresses based on predefined thresholds, the memory system serves itself to detect and prevent row hammer effects, eliminating the need for complex external monitoring circuits.
2Measurement precision
If counting method is used to obtain row hammer address, then the accuracy is improved, but the circuit structure becomes complex and chip area increases
Solution Approach 1:
The patent segments the row address into high address bits and low address bits, using different handling strategies for each segment. High address bits are used to identify candidate row hammer addresses based on access frequency thresholds, while low address bits are used for precise identification. This segmentation allows the system to reduce the complexity of counting operations by focusing only on relevant address bits.
Solution Approach 2:
The system applies different quality levels of monitoring to different parts of the address space. Instead of uniformly counting all row addresses with the same precision, the patent uses high address bits for coarse-grained candidate identification and only performs detailed counting for addresses that meet the candidate criteria, thereby reducing overall circuit complexity while maintaining accuracy where needed.
3Measurement precision
If counting method is used to obtain row hammer address, then the accuracy is improved, but the chip area consumes more resources
Solution Approach 1:
The patent segments the address monitoring function into two parts: high address bit monitoring for candidate identification and low address bit monitoring for precise identification. This segmentation allows the system to use smaller counters for high address bits and only activate detailed low address bit counting when necessary, thereby reducing the total chip area required for the monitoring circuit.
Solution Approach 2:
The system performs partial counting operations by only counting low address bits for addresses that have already been identified as candidates based on high address bit patterns. This partial action approach avoids the need to maintain full-precision counters for all possible row addresses, significantly reducing chip area while maintaining the accuracy needed to identify row hammer addresses.
Data Source
AI summary
A method for obtaining a row hammer refresh address, including: after a row hammer refresh signal arrives, obtaining a current sampling address, and determining whether a high address is locked in a current row hammer refresh cycle; in response to the high address being locked, determining whether a high address of the current sampling address is identical to the locked high address; in response to being identical, updating an access frequency of the locked high address, and updating access frequencies of low addresses with a low address of the current sampling address; and when a next row hammer refresh signal arrives, using a low address with a highest access frequency stored in the group of low registers as a low address of the row hammer refresh address, and using the locked high address as a high address of the row hammer refresh address.