Row-Hammer Cell Initialization via Periodic Refresh Addressing
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Solution Overview
Problem
Existing memory devices face challenges in efficiently initializing row-hammer cells without increasing power consumption, as they require checking counting data stored in these cells to determine if adjacent rows are vulnerable to the row-hammer phenomenon, which can lead to increased power usage and difficulty in managing row-hammer attacks.
Innovation Solution
A memory device and method that utilize a normal refresh command to periodically initialize row-hammer cells by generating consecutive refresh addresses and selectively initializing these cells during refresh cycles, regardless of the counting data, thereby minimizing power consumption while maintaining defense against row-hammer attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory device checks counting data in row-hammer cells to determine vulnerability to row-hammer attacks, then the reliability of defense against row-hammer attacks is improved, but the power consumption increases
Solution Approach 1:
The patent applies preliminary action by proactively initializing row-hammer cells at predetermined intervals regardless of whether they currently contain vulnerable counting data. This preventive approach ensures that even if row-hammer attacks occur between initialization cycles, the damage is minimized because the cells are regularly reset before vulnerability can accumulate to dangerous levels
Solution Approach 2:
The patent implements periodic action by initializing row-hammer cells at regular predetermined intervals using normal refresh commands. This periodic initialization creates a rhythmic reset pattern that prevents counting data from accumulating to vulnerable levels, while utilizing existing refresh infrastructure to minimize additional power consumption
2Reliability
If the memory device frequently initializes row-hammer cells to prevent row-hammer attacks, then the reliability of data protection is improved, but the productivity of normal memory operations deteriorates
Solution Approach 1:
The patent applies universality by making the row-hammer cell initialization function part of the normal refresh operation. The same refresh circuitry and control logic that performs regular memory refreshes also handles row-hammer cell initialization, eliminating the need for separate dedicated initialization operations and maintaining normal memory operation productivity
Solution Approach 2:
The patent merges the row-hammer cell initialization operation with the normal refresh command execution. By combining these two functions into a single operational flow, the system achieves data protection without adding separate initialization steps that would reduce overall memory operation productivity
3Measurement precision
If the memory device implements complex management of row-hammer cells to detect and respond to row-hammer attacks, then the measurement precision of attack detection is improved, but the device complexity increases
Solution Approach 1:
The patent extracts the row-hammer cell management function from complex attack detection and response systems, simplifying it to a basic periodic initialization operation. By separating this function from complex monitoring and analysis systems, the patent achieves adequate protection without requiring sophisticated attack detection mechanisms
Solution Approach 2:
Instead of using complex management to detect attacks and then respond, the patent inverts the approach by using simple periodic initialization to prevent attacks before they can cause damage. This inversion from reactive complex management to proactive simple prevention reduces device complexity while maintaining effective protection
Data Source
AI summary
A memory device includes a memory cell array including row-hammer cells configured to store a number of accesses of a corresponding row of a plurality of rows; an address control circuit configured to generate consecutive first and second refresh addresses according to a normal refresh command, wherein the first refresh address indicates an odd-numbered row during a first refresh cycle and an even-numbered row during a second refresh cycle; and a refresh control circuit configured to refresh, according to the normal refresh command, first and second rows respectively corresponding to the first and second refresh addresses and selectively initialize the row-hammer cells of the first row while refreshing the first row.