Row Hammer Counter Offset Reset for Compact Memory Control
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Solution Overview
Problem
Existing counter systems in integrated circuits are prone to being stuck in a high-level state due to count values reaching a threshold, leading to potential data loss and increased power consumption without effective miniaturization solutions.
Innovation Solution
The implementation of an adjustment circuit that resets counters when a target threshold is reached and adjusts count values by a uniform offset, maintaining the relative magnitude of count values without adding significant bits, thus preventing counters from being stuck and reducing occupied area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If counters continuously count access numbers without reset, then counting precision is maintained, but counters become stuck in high-level state and occupy more area
Solution Approach 1:
The adjustment circuit periodically resets counters when their output reaches a threshold value (e.g., when all bits are high). This periodic reset prevents counters from becoming stuck in the high-level state while maintaining accurate access counting through the offset adjustment mechanism.
Solution Approach 2:
The patent changes the parameter of count values by adding an offset value after reset. Instead of simply resetting to zero, the counter output is adjusted by adding an offset (e.g., offset=1) to maintain the relative magnitude relationship between different row access counts while enabling continuous operation.
2Measurement precision
If counters continuously count access numbers without reset, then counting precision is maintained, but power consumption increases
Solution Approach 1:
The adjustment circuit implements periodic resetting of counters based on threshold detection. This periodic action prevents counters from remaining continuously in the high-level state, thereby reducing static power consumption while maintaining counting accuracy through the offset adjustment mechanism.
3Adaptability or versatility
If significant bits are added to increase counter range, then counting range is extended, but occupied area increases
Solution Approach 1:
The patent implements a dynamic counter system where the effective counting range is extended through periodic reset and offset adjustment. Instead of statically increasing the number of significant bits, the system dynamically manages the counting range by resetting counters at a threshold and adding an offset, achieving extended adaptability without increasing the physical counter size.
Solution Approach 2:
The patent changes the operational parameters of existing counters through offset adjustment. By adding an offset value (e.g., offset=1) to the reset count value, the system effectively extends the counting range and adaptability without adding more significant bits or increasing the counter area.
4Reliability
If counters are reset at target threshold, then counters avoid stuck state, but count value continuity is interrupted
Solution Approach 1:
The adjustment circuit uses feedback from the counter output to detect when the threshold is reached. Based on this feedback, the circuit triggers a reset operation and applies an offset adjustment, ensuring that the counter operates reliably within its range while maintaining the relative magnitude information through the offset mechanism.
Solution Approach 2:
The patent compensates for the interruption in count value continuity by applying an offset adjustment. When the counter is reset, adding the offset value (e.g., offset=1) preserves the relative magnitude relationship between different row access counts, thereby maintaining the essential information needed for row hammer identification despite the reset operation.
Data Source
AI summary
According to one aspect of the present disclosure, a memory is provided. The memory may include a row hammer control circuit including a plurality of counters. Each of the plurality of counters may count a number of accesses of one memory row. Each of the plurality of counters may be configured to generate a first count value. The memory may include an adjustment circuit connected with the plurality of counters. The adjustment circuit may reset each of the plurality of counters when each of a plurality of first count values reaches a target threshold. The adjustment circuit may adjust each of the first count values by a same offset value to generate a plurality of second count values. The row hammer control circuit may determine a target memory row according to the plurality of second count values.