Row Hammer Protection in DRAM via Threshold-Based Access Control

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Solution Overview

Problem

Dynamic Random Access Memory (DRAM) devices experience data corruption due to frequent row activations, known as row hammering, which affects adjacent rows and reduces data retention, especially in applications requiring high reliability such as automotive systems.

Innovation Solution

Implementing a threshold-based system that detects excessive row access metrics in a memory array, triggering a safe mode to prevent further data corruption by restricting access to affected rows and notifying the host device to take mitigation actions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If row access frequency is increased to improve memory performance, then read/write speed is improved, but data corruption occurs in adjacent rows due to row hammering

Engineering Contradiction:
Improveread/write speedVSAvoiddata integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements preliminary detection of row hammering conditions by monitoring row access patterns and comparing them against predefined thresholds. When excessive access patterns are detected before data corruption occurs, the system proactively activates protective measures such as refreshing affected rows or blocking further access to prevent corruption, thereby maintaining data integrity while allowing normal high-speed operations to continue

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors row access metrics and provides feedback to the memory controller. When the monitored access patterns exceed predetermined thresholds, the feedback triggers protective actions such as activating safe mode to restrict access to affected rows or initiating refresh operations, creating a closed-loop control system that dynamically adjusts memory protection based on real-time access patterns

Inventive Principle:
Principle #23Feedback

2Quantity of substance

If memory cell density is increased to improve storage capacity, then quantity of stored data is improved, but susceptibility to row hammering increases due to reduced physical spacing between rows

Engineering Contradiction:
Improvememory capacityVSAvoidrow hammering susceptibility
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by implementing row-specific protection mechanisms rather than uniform protection across the entire memory array. The system identifies specific rows that are susceptible to row hammering based on their physical proximity and access patterns, then applies targeted refresh operations or access restrictions only to those affected rows, leaving other rows operating at full capacity and speed

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system dynamically changes operational parameters such as refresh timing and access restrictions based on detected row hammering conditions. When high-density memory structures show signs of row hammering susceptibility, the controller adjusts refresh intervals or activates safe mode for specific row groups, adapting the memory operation parameters to the physical constraints of high-density configurations

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11625170B2Row hammer protection for a memory device
Publication Date: 2023.04.11 MICRON TECHNOLOGY INC
  • US11625170B2 patent drawing
  • US11625170B2 patent drawing
  • US11625170B2 patent drawing

AI summary

Methods, systems, and devices for row hammer protection for a memory device are described. A memory device may identify a threshold of related row accesses (e.g., access commands or activates to a same row address or a row address space) for a memory array. In a first operation mode, the memory device may execute commands received from a host device on the memory array. The memory device may determine that a metric of the received row access commands satisfies the threshold of related row accesses. The memory device may switch the memory array from the first operation mode to a second operation mode based on satisfying the threshold. The second operation mode may restrict access to at least one row of the memory, while the first mode may be less restrictive. Additionally or alternatively, the memory device may notify the host device that the metric has satisfied the threshold.