R-PHY Resynchronization via Phase Step and Frequency Adjustment

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Solution Overview

Problem

In R-PHY network architectures, synchronization between the CCAP core and Remote PHY Devices (RPDs) becomes problematic when either the core or RPD loses connection to the timing clock, leading to frequency and phase drift, which can impede performance and is costly to address with better oscillators or frequency assistance.

Innovation Solution

A system where the RPD communicates with the core to discover relevant parameters for selecting an appropriate resynchronization method, such as phase step or frequency adjustment, and temporarily adjusts the MAP advance time to regain synchronization, using a processor to instruct the slave timer and potentially utilizing a cloud server for remote recovery instructions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If better oscillators are used to reduce frequency drift during holdover, then timing synchronization performance is improved, but device cost and power consumption increase

Engineering Contradiction:
Improvetiming synchronization performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent introduces an intermediary mechanism (timing recovery process using phase step and frequency adjustment) that mediates between the oscillator and the synchronization requirement. Instead of relying solely on oscillator quality, the system uses a recovery process that adjusts timing parameters after drift occurs, effectively decoupling synchronization performance from oscillator power consumption characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If frequency assistance from the network is used to avoid frequency drift, then timing synchronization performance is improved, but system complexity and infrastructure requirements increase

Engineering Contradiction:
Improvetiming synchronization performanceVSAvoidsystem infrastructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the frequency assistance requirement from the system by implementing a self-contained timing recovery mechanism at the RPD level. The RPD autonomously performs phase step and frequency adjustment using its own measurements and algorithms, removing the dependency on network-wide frequency assistance infrastructure and reducing system complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The RPD implements self-service timing recovery by autonomously detecting drift, selecting appropriate recovery methods (phase step or frequency adjustment), and executing corrections without external intervention. This self-service capability eliminates the need for complex network infrastructure to provide frequency assistance.

Inventive Principle:
Principle #25Self-service

3Reliability

If oscillators with higher stability are deployed to maintain synchronization during holdover, then timing drift is reduced, but both price and power consumption increase

Engineering Contradiction:
Improvesynchronization stabilityVSAvoiddevice cost
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent changes the approach from preventing drift through hardware parameters (oscillator stability) to correcting drift through software-controlled timing parameters (phase step, frequency adjustment). This parameter change allows the use of lower-cost, lower-power oscillators while maintaining synchronization stability through active recovery mechanisms.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3895348B1Systems and methods to improve holdover performance in r-PHY network architectures
Publication Date: 2024.08.28 ARRIS ENTERPRISES LLC
  • EP3895348B1 patent drawingFigure 1~2
  • EP3895348B1 patent drawingFigure 3
  • EP3895348B1 patent drawingFigure 4

AI summary

Systems and methods for regaining synchronization between a CMTS core and an RPD, where both the core and the RPD are configured for individual synchronization in a slave configuration to a common grandmaster clock.