RPIR Queue Mechanism for Low-Latency Packet Reception

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Solution Overview

Problem

Existing networking systems face inefficiencies in data communication due to high latency and overhead when handling small data messages, which significantly impact performance, especially in low-latency and high-bandwidth applications.

Innovation Solution

The implementation of a Receive Packet in Ring (RPIR) queue mechanism that allows direct storage of small data messages in unpinned memory, bypassing the need for multiple read operations and virtual address translations, thereby reducing latency and improving resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If traditional queue mechanisms are used for receiving small data messages, then data can be received with proper error handling and flow control, but latency increases due to multiple read operations and virtual address translations

Engineering Contradiction:
ImprovelatencyVSAvoidqueue mechanism complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent segments the data reception mechanism into two distinct paths: a traditional receive queue path for large data messages and a receive packet in ring (RPIR) path for small data messages. This segmentation allows each path to be optimized independently, with the RPIR path eliminating unnecessary read operations and virtual address translations that plague the traditional path, thereby reducing latency for small messages without affecting the handling of large messages

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary RPIR queue structure that sits between the network interface and the host memory. This intermediary structure provides a direct write path for small data messages, acting as a buffer that eliminates the need for multiple read operations and virtual address translations while maintaining proper data flow control and error handling capabilities

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple read operations and virtual address translations are performed for each data message, then data can be received with proper address mapping and error handling, but resource utilization decreases and overhead increases

Engineering Contradiction:
Improveresource utilizationVSAvoidoverhead time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by pre-allocating and pre-configuring the RPIR queue structure in host memory before data reception begins. The RPIR entries are pre-filled with physical addresses and metadata, eliminating the need for runtime virtual address translations and multiple read operations. This preliminary preparation significantly reduces the overhead time per message while improving resource utilization by eliminating redundant operations

Inventive Principle:
Principle #10Preliminary action

3Productivity

If a unified queue structure is used for both small and large data messages, then memory management is simplified, but performance suffers due to inability to optimize for small message latency

Engineering Contradiction:
Improvenetwork performanceVSAvoidqueue structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating specialized queue structures with different properties for different data message sizes. The RPIR queue is specifically optimized for small messages with direct physical address mapping and no virtual address translation, while the traditional receive queue maintains its structure for large messages. Each queue structure has locally optimized properties tailored to its specific use case, achieving high performance for both small and large messages without requiring a single complex unified structure

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9288163B2Low-latency packet receive method for networking devices
Publication Date: 2016.03.15 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9288163B2 patent drawing
  • US9288163B2 patent drawing
  • US9288163B2 patent drawing

AI summary

When interfacing with a host, a networking device can handle a first data like Bulk Data Receive. The networking device can receive the first data and read a first queue entry from a receive queue in the host memory. In response to the read first queue entry, the networking device can write the first data to an unpinned memory in the host memory. The networking device can also handle a second data with a Receive Packet in Ring (RPIR) queue. The networking device can receive the second data and write the second data to a pinned memory in the host memory. The RPIR queue can be separate from or overlaid on the receive queue. High throughput and low-latency operation can be achieved. The use of a RPIR queue can facilitate the efficiency of resource utilization in the reception of data messages.