RPS Support for NFV via System Call Bypass
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In Network Function Virtualization (NFV) systems, the concentration of system calls on a driver thread leads to high latency and power consumption due to the need for frequent context switching and continuous polling, which is not suitable for demanding workloads.
Innovation Solution
Implementing Receive Packet Steering (RPS) with system call bypass using monitor and memory wait instructions to allow forwarding threads to poll user space memory for packet arrivals, reducing the need for driver thread-initiated system calls and distributing system call overhead across multiple CPUs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the driver thread handles all system calls for packet forwarding, then packet processing is centralized and simple to manage, but latency increases and power consumption rises due to frequent context switching and continuous polling
Solution Approach 1:
The patent segments the centralized driver thread's system call handling by introducing per-CPU forwarding threads. Each forwarding thread independently monitors its designated memory region and handles system calls locally, dividing the monolithic driver thread's workload into distributed units across multiple CPUs, thereby reducing context switching overhead and latency
Solution Approach 2:
Forwarding threads are empowered to autonomously monitor their own memory regions using hardware monitor instructions and wake up automatically when packet data arrives, eliminating the need for continuous polling by the driver thread. This self-service mechanism reduces both power consumption and latency while maintaining simple management through the driver thread's initial setup
2Reliability
If the driver thread continuously polls for packet arrivals, then packet delivery is ensured, but power consumption increases due to the CPU remaining active
Solution Approach 1:
Instead of continuous polling, the patent implements periodic action through hardware-based monitor instructions that put the CPU into a low-power wait state. The CPU periodically checks for memory changes only when necessary, automatically waking up when packet data arrives in the monitored memory region, thus ensuring reliable packet delivery while dramatically reducing power consumption during idle periods
Solution Approach 2:
The patent replaces the mechanical continuous polling mechanism with hardware-based monitor and wait instructions. These instructions leverage CPU hardware features to automatically detect memory changes and trigger wake-up events, eliminating the need for continuous software polling loops and enabling the CPU to enter low-power states while maintaining reliable packet delivery detection
3Device complexity
If system calls are concentrated in the driver thread, then system call handling is simplified, but overhead increases due to frequent context switching between user space and kernel space
Solution Approach 1:
The patent segments system call handling by creating per-CPU forwarding threads that each manage their own system calls independently. This segmentation distributes context switching operations across multiple threads rather than concentrating them in the driver thread, reducing the frequency and impact of context switches while maintaining simplified handling through each thread's localized management of its memory region and packet processing tasks
Solution Approach 2:
The forwarding threads act as intermediaries between the driver thread and the kernel space system calls. They buffer and manage system call operations locally in user space, reducing direct context switching between user and kernel space by handling packet processing operations in the forwarding threads rather than requiring frequent driver thread intervention
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces latency and power consumption by enabling forwarding threads to wake up only when necessary, without driver thread intervention, and efficiently handles high packet volumes by distributing packet processing load across multiple CPUs.
Implementation Method 1
The system call, when executed, executes a monitor instruction on a first CPU of the plurality of CPUs to monitor for updates to a designated memory location
Implementation Method 2
The MWAIT instruction causes the processor to enter a halt state until data has been written to a memory address within the range designated by the MONITOR instruction
Data Source
AI summary
A system for Receive Packet Steering (RPS) support for Network Function Virtualization (NFV) by system call bypass includes a memory, a plurality of central processing units (CPUs) in communication with the memory, an operating system, and a Network Interface Controller (NIC) including a receive queue. The system also includes a driver thread and a plurality of forwarding threads. The driver thread handles the receive queue of the NIC. In an example, a first forwarding thread of the plurality of forwarding threads executes a system call. The first forwarding thread executes on the first CPU. The system call, when executed, executes a monitor instruction on a first CPU to monitor for updates to a designated memory location and checks a condition. Checking the condition includes reading the designated memory location and determining whether information in the designated memory location indicates that a new packet for the first forwarding thread has arrived.