RRAM Barrier Layer Prevents Metal Atom Diffusion

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Solution Overview

Problem

Existing RRAM fabrication methods face performance issues due to metal atom diffusion from the top electrode into the resistance switching layer, affecting electron mobility and insulation ability, leading to reduced switching performance.

Innovation Solution

A fabrication method involving a substrate with a bottom electrode, a resistance switching layer made of amorphous silicon, and a barrier layer of silicon oxide or nitride formed using PECVD, which prevents atom diffusion by controlling deposition rate, thickness, and plasma treatment conditions to enhance the barrier layer's effectiveness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a top electrode is formed directly on the resistance switching layer, then the device structure is simple, but metal atoms diffuse from the top electrode into the resistance switching layer, degrading performance

Engineering Contradiction:
Improvedevice structureVSAvoidswitching performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

An aluminum oxide barrier layer is introduced as an intermediary between the top electrode and the resistance switching layer. This barrier layer prevents metal atom diffusion from the top electrode into the resistance switching layer, thereby maintaining switching performance while allowing the overall device structure to remain relatively simple.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the barrier layer thickness is increased to prevent atom diffusion, then diffusion prevention is improved, but the insulation ability and electron mobility are degraded

Engineering Contradiction:
Improvediffusion preventionVSAvoidinsulation ability
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The thickness of the aluminum oxide barrier layer is precisely controlled within a specific range (5-20 nm). This parameter optimization ensures sufficient diffusion prevention capability while maintaining adequate insulation ability and electron mobility, resolving the contradiction between diffusion prevention and insulation performance.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If PECVD process parameters are optimized for barrier layer deposition, then deposition rate and barrier effectiveness are improved, but process complexity increases

Engineering Contradiction:
Improvebarrier effectivenessVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

PECVD process parameters including temperature (200-400°C), pressure (2-10 Torr), and gas flow rates are optimized to achieve the desired barrier layer quality. These parameter adjustments enable effective barrier formation through a standard PECVD process without requiring additional fabrication steps, thus maintaining process simplicity while ensuring barrier effectiveness.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively prevents metal atom diffusion, improving electron mobility and conductivity of the top electrode, thereby enhancing the overall performance and reliability of the RRAM.

Implementation Method 1

The barrier layer may be formed by a plasma-enhanced vapor deposition (PECVD) process

Methodology Applied
Scientific EffectPlasma-enhanced vapor deposition (PECVD): Plasma Enhanced Chemical Vapour Deposition

Implementation Method 2

The barrier layer is configured to prevent atoms in the top electrode from diffusing into the resistance switching layer

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentEP3151295B1Resistive random access memory and fabrication method thereof
Publication Date: 2019.12.25 SEMICON MFG INT (BEIJING) CORP
  • EP3151295B1 patent drawingFigure 1~3
  • EP3151295B1 patent drawingFigure 4~7
  • EP3151295B1 patent drawingFigure 8~10

AI summary

The present disclosure provides a resistive random access memory (RRAM), comprising a barrier layer configured to prevent atoms in the top electrode from diffusing into the underlying resistance switching layer, and fabrication methods thereof. Preferably, an amorphous silicon resistance switching layer (320) is treated by a nitrogen plasma before forming a silicon oxide or silicon nitride barrier layer (330) and a top electrode (340) comprising aluminium (341).