RRAM Device Bottom Electrode Isolation
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Solution Overview
Problem
As RRAM cells scale down, the narrower bit-to-bit pitch makes it difficult to form sidewall spacers, leading to potential electrical leakage between electrodes and performance degradation due to the challenges in forming sufficient isolation.
Innovation Solution
The formation of a RRAM device without sidewall spacers, where a polymer material is accumulated along the sidewalls of the top electrode during in-situ etching processes to pattern the bottom electrode, and a conformal top dielectric layer is used to provide electrical isolation between the electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sidewall spacers are formed to provide electrical isolation between electrodes, then electrical leakage is prevented, but the device complexity and manufacturing difficulty increase due to the need for additional patterning steps
Solution Approach 1:
The patent removes the sidewall spacer component entirely from the RRAM cell structure. Instead of forming sidewall spacers around the top electrode to provide isolation, the invention uses a bottom electrode design with lateral extensions that directly provide the isolation function, eliminating the need for this intermediate structure and simplifying the patterning process.
Solution Approach 2:
The bottom electrode is designed to serve multiple functions: it acts as both the functional electrode for resistance switching and provides electrical isolation between adjacent cells through its lateral extensions. This multi-functional design eliminates the need for separate isolation structures like sidewall spacers.
2Reliability
If sidewall spacers are formed to ensure sufficient isolation distance, then electrical leakage is prevented, but the area occupied by the RRAM cell increases
Solution Approach 1:
The patent combines the electrode function and isolation function into a single structure. The bottom electrode's lateral extensions serve both as electrical contacts and as isolation barriers, merging two previously separate functions into one integrated component that reduces the overall cell footprint.
Solution Approach 2:
The isolation function is achieved by extending the bottom electrode laterally in the horizontal plane rather than using vertical sidewall spacers. This dimensional approach allows isolation to be provided within the same lateral footprint as the top electrode, avoiding additional area occupation.
3Productivity
If the bit-to-bit pitch is reduced to enable scaling, then device density increases, but the difficulty of forming sidewall spacers increases leading to potential electrical leakage
Solution Approach 1:
The patent eliminates the sidewall spacer formation step from the manufacturing process entirely. By using bottom electrode lateral extensions for isolation, the invention removes the complex multi-step spacer formation process that becomes increasingly difficult as pitch scales down, making the fabrication process more robust at smaller dimensions.
Data Source
AI summary
The present disclosure relates to an integrated circuits device having a RRAM cell, and an associated method of formation. In some embodiments, the integrated circuit device has a lower metal interconnect layer surrounded by a lower ILD layer and a bottom electrode disposed over the lower metal interconnect layer. The bottom electrode has a lower portion surrounded by a bottom dielectric layer and an upper portion wider than the lower portion. The bottom dielectric layer is disposed over the lower metal interconnect layer and the lower ILD layer. The integrated circuit device also has a RRAM dielectric with a variable resistance located on the bottom electrode, and a top electrode located over the RRAM dielectric. The integrated circuit device also has a top dielectric layer located over the bottom dielectric layer abutting sidewalls of the upper portion of the bottom electrode, the RRAM dielectric, and the top electrode.