RRAM Composite Layers for Fast Switching and Low Current

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Solution Overview

Problem

Resistive random access memory (RRAM) devices have higher programming current and longer programming time compared to spin-transfer torque magnetoresistive RAM (STT-MRAM), which hinders their efficiency and speed in data storage and retrieval.

Innovation Solution

A resistive memory device structure is developed with composite material layers comprising a metal-based high-K dielectric material layer and a metal layer, where the layers are alternately stacked between the upper and lower electrodes, reducing the thickness of each layer to less than 5 nm, and utilizing metals like Hf, Ti, and Al, to facilitate faster switching between conducting and non-conducting states, thereby lowering programming current and time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional RRAM structure is used, then data storage capability is achieved, but programming current is high and programming time is long

Engineering Contradiction:
Improveprogramming speedVSAvoidprogramming current
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent uses composite material layers consisting of metal-based high-K dielectric material layers and metal layers alternately stacked between electrodes. This composite structure enables faster switching between conducting and non-conducting states, reducing programming current to 1E-5A and programming time to 10 ns, thereby resolving the contradiction between programming speed and energy consumption.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent reduces the thickness of each layer in the composite structure to less than 5 nm. This parameter change (reducing thickness) facilitates faster electron transport and switching, which directly reduces both programming time and the current required for programming, addressing the technical contradiction.

Inventive Principle:
Principle #35Parameter changes

2Loss of time

If layer thickness is reduced to less than 5 nm, then programming time is shortened, but manufacturing precision requirements increase

Engineering Contradiction:
Improveprogramming timeVSAvoidlayer thickness control
Core Design Contradiction:
Loss of timeVSManufacturing precision

Solution Approach 1:

The patent specifies reducing layer thickness to less than 5 nm to achieve faster switching and shorter programming time (10 ns). This parameter change directly addresses the time loss issue while establishing a clear manufacturing target that balances speed improvement with fabrication feasibility.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed structure reduces programming current to 1E-5A and shortens programming time to 10 ns, enhancing the efficiency and speed of data storage in RRAM devices compared to conventional methods.

Implementation Method 1

Each memory cell has a large conductive bridge between the upper and lower electrodes. The conductive bridge forms a conductive path, which, depending on the applied voltage, can switch between a conducting state and a non-conducting state.

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

The first layer is a metal-based high-K dielectric material layer having a first metal element. The high-K dielectric material layer has a dielectric constant that is higher than the dielectric constant of silicon dioxide.

Methodology Applied
Scientific EffectDielectric property: Dielectric

Data Source

PatentUS9419057B2Resistive random access memory device and manufacturing methods
Publication Date: 2016.08.16 SEMICON MFG INT (BEIJING) CORP
  • US9419057B2 patent drawing
  • US9419057B2 patent drawing
  • US9419057B2 patent drawing

AI summary

A resistive memory storage device includes a lower electrode, an upper electrode and a plurality of composite material layers disposed between the lower electrode and the upper electrode. Each composite material layer includes a first layer and a second layer. The first layer is a metal-based high-K dielectric material layer having a first metal element, and the second layer is a metal layer having the first metal element.