RRAM Computing-in-Memory Circuit for Low-Power Current Summation
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Solution Overview
Problem
The increasing memory access power wall and high energy consumption during data transfer in traditional computing systems, particularly in machine learning applications with artificial neural networks, hinder computational efficiency.
Innovation Solution
A computing-in-memory circuit that integrates a resistive random access memory array, clamping circuit, and analog-to-digital conversion circuit to perform computations during data readout, utilizing current-type operations and reducing the need for additional voltage-to-current conversions, thereby integrating computing and storing functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional von Neumann architecture is used for data processing, then data can be stored and processed separately, but memory access power consumption increases and computational efficiency decreases
Solution Approach 1:
The patent merges memory and computing functions into a single computing-in-memory circuit. The resistive random access memory array performs both data storage and multiplication operations simultaneously, eliminating the need to transfer data between separate memory and processor units, thus reducing memory access power consumption while improving computational efficiency
Solution Approach 2:
The resistive random access memory array serves multiple functions: it stores data, performs multiplication operations through conductance measurements, and outputs results through current mirrors. This multi-functionality allows the same hardware to handle both storage and computation tasks, addressing the energy efficiency and productivity contradiction
2Ease of operation
If data is transferred between memory and processor in traditional systems, then data can be accessed for processing, but energy consumption during data transfer increases
Solution Approach 1:
The patent extracts the computing function from the separate processor and integrates it directly into the memory array. By taking out the multiplication operation and performing it within the memory circuit itself through conductance measurements and current mirrors, data transfer is eliminated while maintaining data accessibility for processing
3Speed
If current-type computation is performed during data readout in computing-in-memory design, then computation speed improves, but circuit complexity increases
Solution Approach 1:
The resistive random access memory array performs computation autonomously during the data readout process. The conductance of memory cells naturally produces current proportional to stored values, and the current mirror circuit automatically sums these currents without requiring external control or additional conversion circuits, achieving self-service computation that improves speed while minimizing added complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and improves computation speed by minimizing circuit overhead and data transfer delays, making it suitable for low-power edge computing scenarios.
Implementation Method 1
the clamping circuit clamps the input signal, and the clamping voltage is converted into a current signal through the resistive random access memory array
Implementation Method 2
the current mirror is connected between the resistive random access memory array and the analog-to-digital conversion circuit, configured to output convergence current to the analog-to-digital conversion circuit based on the N-way currents output from the N resistive random access memories selected
Data Source
AI summary
The present application discloses a computing-in-memory circuit, chip and electronic device, wherein the computing-in-memory circuit comprises: a resistive random access memory array, a clamping circuit, a current mirror and an analog-to-digital conversion circuit; the clamping circuit is connected between a signal input terminal and the resistive random access memory array, configured to input clamping voltage signal to the N resistive random access memories selected of the resistive random access memory array, wherein N is an integer and N≥2; the current mirror is connected between the resistive random access memory array and the analog-to-digital conversion circuit, configured to output convergence current to the analog-to-digital conversion circuit based on the N-way currents output from the N resistive random access memories selected; the analog-to-digital conversion circuit configured to convert the convergence current to a digital signal.