RRAM and Dual Damascene Integration With Fewer Mask Steps

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Solution Overview

Problem

The manufacturing process of resistive random access memory (RRAM) devices requires at least three mask processes, and there is currently no research on integrating this process with the manufacturing process of a dual damascene structure.

Innovation Solution

A semiconductor device and manufacturing method that simultaneously form a RRAM device and a dual damascene structure with few mask processes, incorporating a spacer in the sidewall of the RRAM device and using a dual damascene hole with a void and a trench in the dielectric layer near the RRAM device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the manufacturing process of RRAM device is performed separately from dual damascene structure, then the RRAM device can be manufactured with standard processes, but the number of mask processes increases and manufacturing cost increases

Engineering Contradiction:
Improvemanufacturing process integrationVSAvoidprocess integration complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the RRAM device manufacturing process with the dual damascene structure manufacturing process into a single integrated process. The same mask patterns are used to form both the RRAM device openings and the dual damascene via/trench structures simultaneously, eliminating the need for separate mask processes and reducing overall manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The mask patterns serve multiple functions: they define the openings for RRAM device formation and simultaneously define the via and trench patterns for the dual damascene structure. This multi-functionality of the mask process reduces the total number of mask steps required and integrates both manufacturing streams.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If three mask processes are used for RRAM device manufacturing, then the RRAM device can be formed with proper structure, but the manufacturing cost and process time increase

Engineering Contradiction:
ImproveRRAM device structure precisionVSAvoidmanufacturing cycle time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent combines multiple mask processes into a single mask step that simultaneously forms the RRAM device openings and the dual damascene structures. This merging maintains the required structural precision for RRAM devices while significantly reducing the manufacturing cycle time by eliminating redundant mask application and removal steps.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If RRAM device and dual damascene structure are manufactured separately, then each structure can be optimized independently, but the overall device size and manufacturing complexity increase

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoiddevice footprint
Core Design Contradiction:
Ease of manufactureVSArea of moving object

Solution Approach 1:

The patent merges the formation of RRAM devices and dual damascene structures into a single process step using the same mask pattern. This approach reduces the overall device footprint by eliminating the need for separate process areas and reduces manufacturing efficiency losses associated with multiple sequential processes.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250113495A1Semiconductor device and manufacturing method thereof
Publication Date: 2025.04.03 UNITED MICROELECTRONICS CORP
  • US20250113495A1 patent drawing
  • US20250113495A1 patent drawing
  • US20250113495A1 patent drawing

AI summary

A semiconductor device includes a resistive random access memory (RRAM) device, a dual damascene structure, and a spacer. The dual damascene structure is disposed near the RRAM device, and the spacer is disposed in a sidewall of the RRAM device. The RRAM device includes a lower electrode, a metal oxide layer, and an upper electrode. The metal oxide layer is disposed on the lower electrode, and the upper electrode is disposed on the metal oxide layer. The dual damascene structure includes a via and a wire disposed on the via, in which a top part of the wire is coplanar with a top part of the upper electrode in the RRAM device.