RRAM Dual-Variable Resistance Layer Storage Density

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Solution Overview

Problem

Resistive random access memory (RRAM) faces limitations in data retention capability and storage density due to its configuration with a single variable resistance layer between electrodes, which restricts its programming levels and current on/off ratio.

Innovation Solution

Incorporating two variable resistance layers between the lower and upper electrodes, allowing for multiple resistance states and improved material selection to enhance current ratio and threshold voltage, thereby increasing storage density and data retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single variable resistance layer is used between electrodes, then the device structure is simple, but the storage density and programming levels are limited

Engineering Contradiction:
Improvestructure complexityVSAvoidstorage density
Core Design Contradiction:
Device complexityVSQuantity of substance

Solution Approach 1:

The single variable resistance layer is segmented into multiple variable resistance layers (first variable resistance layer and second variable resistance layer) disposed between the electrodes. This segmentation enables multiple resistance states within the same device footprint, increasing storage density without significantly complicating the overall device structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-layer configuration to a multi-layer configuration by adding the dimension of layer stacking. The first and second variable resistance layers are disposed in different spatial positions between the electrodes, creating additional resistance states along the vertical dimension while maintaining the same planar footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If a single variable resistance layer is used, then the manufacturing process is simple, but the data retention capability is insufficient

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoiddata retention capability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The variable resistance function is segmented across multiple layers, where the first variable resistance layer and second variable resistance layer can be formed using different material compositions or structural characteristics. This segmentation enhances data retention capability while maintaining compatibility with existing manufacturing processes through sequential layer deposition.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite material structures where the first variable resistance layer and second variable resistance layer may use different materials or material combinations. This composite approach optimizes both data retention capability and manufacturing feasibility by selecting materials that work together synergistically in the multi-layer configuration.

Inventive Principle:
Principle #40Composite materials

3Reliability

If material selection is optimized for current ratio, then the on/off ratio improves, but the threshold voltage stability may be compromised

Engineering Contradiction:
Improvecurrent on/off ratioVSAvoidthreshold voltage stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

Different material compositions or structural properties are assigned to different regions (first variable resistance layer and second variable resistance layer) to optimize local functions. One layer may be optimized for current ratio while the other maintains threshold voltage stability, allowing both parameters to be improved simultaneously through localized material optimization.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10811603B2Resistive random access memory
Publication Date: 2020.10.20 WINBOND ELECTRONICS CORP
  • US10811603B2 patent drawing
  • US10811603B2 patent drawing
  • US10811603B2 patent drawing

AI summary

A resistive random access memory (RRAM) is provided. The RRAM includes a lower electrode, an upper electrode, a first variable resistance layer and a second variable resistance layer. The lower electrode is disposed on a substrate, and is a single electrode or a pair of electrodes electrically connected to each other. The upper electrode is disposed on the lower electrode, and overlaps the lower electrode. The first variable resistance layer and the second variable resistance layer are disposed on the substrate. At least a portion of the first variable resistance layer is disposed between the lower electrode and the upper electrode, and at least a portion of the second variable resistance layer is disposed between the lower electrode and the upper electrode and connected to the first variable resistance layer.