RRAM Cell Edge-Dislocation Filament Control

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Solution Overview

Problem

Resistive random-access memory (RRAM) devices, particularly conductive-bridge RRAM (CBRAM), face challenges in achieving consistent electrical switching properties due to the unpredictable formation and location of thread filaments between electrodes, leading to varying electrical characteristics across cells.

Innovation Solution

The method involves growing a crystalline semiconductor layer with periodically spaced edge-dislocations at the interface with a substrate, using a hard mask to selectively etch and form CBRAM cells, and depositing conductive filaments along these edge-dislocations to create consistent conductive bridges between electrodes, enhancing the stability and control of filament formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional RRAM cell formation methods are used, then manufacturing is simpler, but electrical switching properties are inconsistent due to unpredictable filament formation

Engineering Contradiction:
Improveelectrical switching consistencyVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a preliminary action by forming a template layer with a crystal structure that differs from the substrate before depositing the active layer. This template layer pre-establishes the positions where thread filaments will form, ensuring consistent and predictable filament locations without requiring complex post-processing steps. The template layer acts as a guide that directs filament formation during subsequent processing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The template layer serves as an intermediary structure between the substrate and the active layer. It mediates the interaction between the two by providing a controlled interface that dictates where thread filaments will form. This intermediary layer translates the substrate's crystal structure into a predictable pattern of filament formation, resolving the inconsistency issue without adding significant manufacturing complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If thread filaments are allowed to form naturally, then device structure is simpler, but filament location is unpredictable leading to varying electrical characteristics

Engineering Contradiction:
Improvefilament location controlVSAvoiddevice structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The template layer is formed in advance with a specific crystal structure that pre-determines the locations of thread filaments. This preliminary structuring allows precise control over where filaments will form during device operation, eliminating the unpredictability of natural filament formation while maintaining a relatively simple overall device structure.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The template layer introduces local quality variations at the interface between the substrate and active layer. By creating specific regions with different crystal structures or orientations in the template layer, the patent locally controls where thread filaments will form, achieving precise filament location control without requiring complex modifications to the entire device structure.

Inventive Principle:
Principle #3Local quality

3Reliability

If multiple processing steps are added to control filaments, then filament consistency improves, but manufacturing time increases

Engineering Contradiction:
Improvecell-to-cell uniformityVSAvoidmanufacturing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The template layer approach performs the filament-positioning function during the initial deposition process rather than requiring separate control steps later. By embedding the positioning information in the template layer's crystal structure, the patent achieves cell-to-cell uniformity while avoiding additional time-consuming processing steps, thus maintaining high manufacturing throughput.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The template layer structure enables the device to self-organize filaments in the correct positions during normal operation without requiring external intervention or additional processing steps. The crystal structure of the template layer automatically guides filament formation, allowing the device to achieve consistency through its own structure rather than through complex manufacturing processes.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in RRAM cells with more consistent electrical switching properties and increased stability, allowing for reliable non-volatile data storage by precisely controlling the location and number of conductive filaments, thereby improving the performance and longevity of CBRAM cells.

Implementation Method 1

diffusing a conductive material along the edge-dislocation segment

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS11637238B2Resistive random-access memory cell and manufacturing method thereof
Publication Date: 2023.04.25 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11637238B2 patent drawing
  • US11637238B2 patent drawing
  • US11637238B2 patent drawing

AI summary

An resistive random-access memory (RRAM) device including an first crystalline semiconductor layer disposed adjacent to a crystalline semiconductor substrate, a crystal lattice edge-dislocation segment disposed at an interface of the first crystalline semiconductor layer and crystalline semiconductor substrate, the lattice edge-dislocation segment including first and second segment ends, a first ion-source electrode disposed upon the electrically isolating spacer, adjacent to the crystalline substrate and first crystalline semiconductor layer, and further disposed in contact with the first segment end of the lattice edge-dislocation segment, and a second electrode disposed upon the electrically isolating spacer, adjacent to the crystalline substrate and first crystalline semiconductor layer, and further disposed in contact with the second segment end of the lattice edge-dislocation segment.