Resistive Memory Error Correction via Virtual Reference
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Solution Overview
Problem
Resistive random access memories (RRAMs) face high error rates due to resistance value drifting, which degrades performance and is not effectively addressed by existing error correction codes, especially in 2T2R memories.
Innovation Solution
A method to identify and invert 'weak' bits in a 2T2R resistive memory codeword using single-mode 1T1R read operations, comparing resistive element values with a reference, to correct errors without modifying the memory matrix or using additional reference values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction codes are used in 2T2R resistive memories, then reliability is improved, but device complexity increases due to additional reference values and modified memory matrix requirements
Solution Approach 1:
The invention creates a virtual copy of the reference value RREF in the form of a generated reference value that is computationally derived from the read value and resistance drift characteristics. This eliminates the need for physical additional reference values in the memory matrix, reducing device complexity while maintaining error correction capability
Solution Approach 2:
The invention transitions from a spatial solution (adding physical reference values in the memory matrix) to a computational solution (generating reference values through processing). This dimensionality change from physical space to computational space resolves the contradiction between reliability and device complexity
2Measurement precision
If additional reference values are stored in the memory matrix, then error correction precision is improved, but storage capacity is reduced
Solution Approach 1:
Instead of storing physical copies of reference values in the memory matrix, the invention generates reference values computationally from existing read values and drift characteristics. This virtual copying approach maintains measurement precision without consuming additional storage capacity
Solution Approach 2:
The invention introduces a computational intermediary process that generates reference values on-demand from existing data. This intermediary mechanism provides the necessary reference information for error detection without requiring additional storage space in the memory matrix
3Reliability
If resistance drift is compensated using traditional ECC methods, then reliability is improved, but latency increases due to additional read operations
Solution Approach 1:
The invention performs preliminary characterization of resistance drift during manufacturing or initial operation, storing drift coefficients that can be used to generate reference values during normal read operations. This preliminary action eliminates the need for additional read operations during error correction, reducing latency while maintaining reliability
Solution Approach 2:
The invention changes the parameter representation from storing absolute reference values to storing drift coefficients that can be used to generate reference values dynamically. This parameter transformation enables faster error correction by avoiding additional read operations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves error correction in 2T2R RRAMs by identifying and correcting bits prone to errors, reducing the primary error rate and enhancing the reliability of data storage without increasing storage costs or latency.
Implementation Method 1
An RRAM memory cell is equipped with at least one resistive element the conductance of which is able to be modified... the cell to toggle reversibly between two HRS and LRS resistance states
Implementation Method 2
it is generally checked that the memory cell is programmed correctly by comparing its resistance value R with a predefined resistance threshold value RREF
Data Source
AI summary
A solution for improving the correction of errors in a 2T2R resistive memory protected by an error correction code. A method that makes it possible, through 1T1R read operations, to identify, in a codeword stored in memory, bits liable to be incorrect, called “erasures”, and then to invert these bits in the stored codeword in order to generate a new word corrected by the ECC.